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Title: Self-calibrating multiplexer circuit

Abstract

A time domain multiplexer system with automatic determination of acceptable multiplexer output limits, error determination, or correction is comprised of a time domain multiplexer, a computer, a constant current source capable of at least three distinct current levels, and two series resistances employed for calibration and testing. A two point linear calibration curve defining acceptable multiplexer voltage limits may be defined by the computer by determining the voltage output of the multiplexer to very accurately known input signals developed from predetermined current levels across the series resistances. Drift in the multiplexer may be detected by the computer when the output voltage limits, expected during normal operation, are exceeded, or the relationship defined by the calibration curve is invalidated. 3 figs.

Inventors:
Publication Date:
OSTI Identifier:
504962
Patent Number(s):
US 5,625,314/A/
Application Number:
PAN: 8-499,886
Assignee:
Dept. of Energy, Washington, DC (United States)
Resource Type:
Patent
Resource Relation:
Other Information: PBD: 29 Apr 1997
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING NOT INCLUDED IN OTHER CATEGORIES; MULTIPLEXERS; DESIGN; CALIBRATION; COMPUTERS; ELECTRIC POTENTIAL; CORRECTIONS

Citation Formats

Wahl, C P. Self-calibrating multiplexer circuit. United States: N. p., 1997. Web.
Wahl, C P. Self-calibrating multiplexer circuit. United States.
Wahl, C P. 1997. "Self-calibrating multiplexer circuit". United States.
@article{osti_504962,
title = {Self-calibrating multiplexer circuit},
author = {Wahl, C P},
abstractNote = {A time domain multiplexer system with automatic determination of acceptable multiplexer output limits, error determination, or correction is comprised of a time domain multiplexer, a computer, a constant current source capable of at least three distinct current levels, and two series resistances employed for calibration and testing. A two point linear calibration curve defining acceptable multiplexer voltage limits may be defined by the computer by determining the voltage output of the multiplexer to very accurately known input signals developed from predetermined current levels across the series resistances. Drift in the multiplexer may be detected by the computer when the output voltage limits, expected during normal operation, are exceeded, or the relationship defined by the calibration curve is invalidated. 3 figs.},
doi = {},
url = {https://www.osti.gov/biblio/504962}, journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Apr 29 00:00:00 EDT 1997},
month = {Tue Apr 29 00:00:00 EDT 1997}
}