Transistors using crystalline silicon devices on glass

Patent · Tue May 09 00:00:00 EDT 1995

OSTI ID:46307

McCarthy, A M

A method is disclosed for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed. 13 figs.

• Research Organization: Univ. of California (United States)
• DOE Contract Number: W-7405-ENG-48
• Assignee: Univ. of California, Oakland, CA (United States)
• Patent Number(s): US 5,414,276/A/
• Application Number: PAN: 8-137,402
• OSTI ID: 46307
• Resource Relation: Other Information: PBD: 9 May 1995
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING NOT INCLUDED IN OTHER CATEGORIES
TRANSISTORS
FABRICATION
ELECTRIC POTENTIAL
ELECTRIC CURRENTS
MONOCRYSTALS