Self-stressing structures for wafer-level oxide breakdown to 200 MHz
- Sandia National Labs., Albuquerque, NM (United States)
- Philips Semiconductors, Albuquerque, NM (United States)
We have demonstrated for the first time high frequency (210 MHz) oxide breakdown at the wafer-level using on-chip, self-stressing test structures. This is the highest frequency oxide breakdown that has been reported. We used these structures to characterize the variation in oxide breakdown with frequency (from 1 Hz to over 200 MHz) and duty cycle (from 10% to 90%). Since the stress frequency, duty cycle and temperature are controlled by DC signals in these structures, we used conventional DC wafer-level equipment without any special modifications (such as high frequency cabling). This self-stressing structure significantly reduces the cost of performing realistic high frequency oxide breakdown experiments necessary for developing reliability models and building-in-reliability.
- Research Organization:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE, Washington, DC (United States)
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 32546
- Report Number(s):
- SAND-95-0146C; CONF-9410311-1; ON: DE95006818; TRN: 95:003001
- Resource Relation:
- Conference: 1994 integrated reliability workshop, Lake Tahoe, CA (United States), 16-19 Oct 1994; Other Information: PBD: [1995]
- Country of Publication:
- United States
- Language:
- English
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