skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Properties of slow traps of ALD Al{sub 2}O{sub 3}/GeO{sub x}/Ge nMOSFETs with plasma post oxidation

Abstract

The realization of Ge gate stacks with a small amount of slow trap density as well as thin equivalent oxide thickness and low interface state density (D{sub it}) is a crucial issue for Ge CMOS. In this study, we examine the properties of slow traps, particularly the location of slow traps, of Al{sub 2}O{sub 3}/GeO{sub x}/n-Ge and HfO{sub 2}/Al{sub 2}O{sub 3}/GeO{sub x}/n-Ge MOS interfaces with changing the process and structural parameters, formed by atomic layer deposition (ALD) of Al{sub 2}O{sub 3} and HfO{sub 2}/Al{sub 2}O{sub 3} combined with plasma post oxidation. It is found that the slow traps can locate in the GeO{sub x} interfacial layer, not in the ALD Al{sub 2}O{sub 3} layer. Furthermore, we study the time dependence of channel currents in the Ge n-MOSFETs with 5-nm-thick Al{sub 2}O{sub 3}/GeO{sub x}/Ge gate stacks, with changing the thickness of GeO{sub x}, in order to further clarify the position of slow traps. The time dependence of the current drift and the effective time constant of slow traps do not change among the MOSFETs with the different thickness GeO{sub x}, demonstrating that the slow traps mainly exist near the interfaces between Ge and GeO{sub x}.

Authors:
; ; ; ;  [1]
  1. Department of Electrical Engineering and Information Systems, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan and JST-CREST, K's Gobancho 6F, 7 Gobancho, Chiyoda-ku, Tokyo 102-0076 (Japan)
Publication Date:
OSTI Identifier:
22594465
Resource Type:
Journal Article
Resource Relation:
Journal Name: Applied Physics Letters; Journal Volume: 109; Journal Issue: 3; Other Information: (c) 2016 Author(s); Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS; 75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY; ALUMINIUM OXIDES; DENSITY; GERMANIUM OXIDES; HAFNIUM OXIDES; INTERFACES; LAYERS; MOSFET; OXIDATION; SILICON OXIDES; STACKS; THICKNESS; TIME DEPENDENCE; TRAPS

Citation Formats

Ke, M., E-mail: kiramn@mosfet.t.u-tokyo.ac.jp, Yu, X., Chang, C., Takenaka, M., and Takagi, S.. Properties of slow traps of ALD Al{sub 2}O{sub 3}/GeO{sub x}/Ge nMOSFETs with plasma post oxidation. United States: N. p., 2016. Web. doi:10.1063/1.4958890.
Ke, M., E-mail: kiramn@mosfet.t.u-tokyo.ac.jp, Yu, X., Chang, C., Takenaka, M., & Takagi, S.. Properties of slow traps of ALD Al{sub 2}O{sub 3}/GeO{sub x}/Ge nMOSFETs with plasma post oxidation. United States. doi:10.1063/1.4958890.
Ke, M., E-mail: kiramn@mosfet.t.u-tokyo.ac.jp, Yu, X., Chang, C., Takenaka, M., and Takagi, S.. 2016. "Properties of slow traps of ALD Al{sub 2}O{sub 3}/GeO{sub x}/Ge nMOSFETs with plasma post oxidation". United States. doi:10.1063/1.4958890.
@article{osti_22594465,
title = {Properties of slow traps of ALD Al{sub 2}O{sub 3}/GeO{sub x}/Ge nMOSFETs with plasma post oxidation},
author = {Ke, M., E-mail: kiramn@mosfet.t.u-tokyo.ac.jp and Yu, X. and Chang, C. and Takenaka, M. and Takagi, S.},
abstractNote = {The realization of Ge gate stacks with a small amount of slow trap density as well as thin equivalent oxide thickness and low interface state density (D{sub it}) is a crucial issue for Ge CMOS. In this study, we examine the properties of slow traps, particularly the location of slow traps, of Al{sub 2}O{sub 3}/GeO{sub x}/n-Ge and HfO{sub 2}/Al{sub 2}O{sub 3}/GeO{sub x}/n-Ge MOS interfaces with changing the process and structural parameters, formed by atomic layer deposition (ALD) of Al{sub 2}O{sub 3} and HfO{sub 2}/Al{sub 2}O{sub 3} combined with plasma post oxidation. It is found that the slow traps can locate in the GeO{sub x} interfacial layer, not in the ALD Al{sub 2}O{sub 3} layer. Furthermore, we study the time dependence of channel currents in the Ge n-MOSFETs with 5-nm-thick Al{sub 2}O{sub 3}/GeO{sub x}/Ge gate stacks, with changing the thickness of GeO{sub x}, in order to further clarify the position of slow traps. The time dependence of the current drift and the effective time constant of slow traps do not change among the MOSFETs with the different thickness GeO{sub x}, demonstrating that the slow traps mainly exist near the interfaces between Ge and GeO{sub x}.},
doi = {10.1063/1.4958890},
journal = {Applied Physics Letters},
number = 3,
volume = 109,
place = {United States},
year = 2016,
month = 7
}
  • The ultrathin GeO{sub x}/Ge interfaces formed on Ge (100) and (111) surfaces by applying plasma post oxidation to thin Al{sub 2}O{sub 3}/Ge structures are characterized in detail using X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy. It is found that the XPS signals assigned to Ge 1+ and the 2+ states in the GeO{sub x} layers by post plasma oxidation have oscillating behaviors on Ge (100) surfaces in a period of {approx}0.3 nm with an increase in the GeO{sub x} thickness. Additionally, the oscillations of the signals assigned to Ge 1+ and 2+ states show opposite phase to each other.more » The similar oscillation behaviors are also confirmed on Ge (111) surfaces for Ge 1+ and 3+ states in a period of {approx}0.5 nm. These phenomena can be strongly regarded as an evidence of the atomic layer-by-layer oxidation of GeO{sub x}/Ge interfaces on Ge (100) and (111) surfaces.« less
  • The effects of post-oxidation processing on the initial performance (as measured here by pre-irradiation fixed-charge and interface-state densities) and radiation response of rapid thermally processed, metal-oxide-semiconductor (MOS) capacitors are investigated. The processing dependencies for the major groups of processing- and radiation-induced defects are discussed with respect to recent gains in understanding of the Si-SiO{sub 2} interfacial structure. Processing conditions for ideal initial properties are found to be quite different than those required for optimum radiation response. Guidelines for optimal post-oxidation thermal processing are given, taking into consideration both the initial performance and radiation response of the MOS device. The resultsmore » indicate that even when using rapid thermal processing, post-gate oxide anneals above 900 {degree}C degrade the radiation tolerance.« less
  • First observational evidence is presented for low-frequency slow mode MHD turbulence in the solar wind (fless than or equal to5 x 10/sup -3/ Hz, deltaB-deltaN coherence greater than 0.6) by employing power and coherence spectral analysis of the Helios high time resolution solar wind plasma and magnetic field observations. This turbulence occurs directly behind an interplanetary slow forward shock wave at 0.31 AU. As the foreshock plasma conditions are such that steepening of slow waves is favored in comparison to Landau damping, the observations presented here do in addition provide unique support to the theoretical results of Hada and Kennelmore » (1985). It is also shown that the turbulence upstream is predominantly Alfvenic (fapprox. >10/sup : //sup 2/ Hz, deltaB-deltaV coherence greater than 0.94) and propagating away from the Sun (shock). Thus we provide an example of an interplanetary slow shock where the turbulence upstream and downstream is completely different in nature. Moreover, the ''evolutionary conditions'' for slow shocks indicate that the downstream (upstream) turbulence could not have been generated by an interaction and wave mode conversion of the upstream (downstream) turbulence with and by the slow shock, respectively. copyright American Geophysical Union 1987« less
  • Convergent lines of evidence are reviewed which show that near-interfacial oxide traps (border traps) that exchange charge with the Si can strongly affect the performance, radiation response, and long-term reliability of MOS devices. Observable effects of border traps include capacitance-voltage (C-V) hysteresis, enhanced l/f noise, compensation of trapped holes, and increased thermally stimulated current in MOS capacitors. Effects of faster (switching times between {approximately}10{sup {minus}6} s and {approximately}1 s) and slower (switching times greater than {approximately}1 s) border traps have been resolved via a dual-transistor technique. In conjunction with studies of MOS electrical response, electron paramagnetic resonance and spin dependentmore » recombination studies suggest that E{prime} defects (trivalent Si centers in SiO{sub 2} associated with O vacancies) can function as border traps in MOS devices exposed to ionizing radiation or high-field stress. Hydrogen-related centers may also be border traps.« less