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Title: Contactless analysis of electric dipoles at high-k/SiO{sub 2} interfaces by surface-charge-switched electron spectroscopy

Journal Article · · Applied Physics Letters
DOI:https://doi.org/10.1063/1.4952723· OSTI ID:22590690
; ; ;  [1];  [2];  [3];  [4]
  1. Research and Development Initiative for Scientific Innovation of New Generation Batteries, Office of Society-Academia Collaboration for Innovation, Kyoto University, Sakyo-ku, Kyoto 606-8501 (Japan)
  2. Department of Electrical and Electronic Engineering, Shinshu University, Nagano 380-8553 (Japan)
  3. R&D Center, Panasonic Corporation, Moriguchi, Osaka 570-8501 (Japan)
  4. Department of Materials Science and Engineering, Kyoto University, Sakyo-ku, Kyoto 606-8501 (Japan)

The continuous development of silicon devices has been supported by fundamental understanding of the two interfaces that predict the device properties: high-dielectric oxide (high-k)/SiO{sub 2} and SiO{sub 2}/Si. In the absence of metal electrode fabrication, it is challenging to use spectroscopic approaches to deduce the electric dipoles in these interfaces for the prediction of electrical characteristics such as the leakage current and threshold voltage. Here, we propose a method to analyze the permanent dipole at the high-k/SiO{sub 2} interface by surface-charge-switched electron spectroscopy (SuCSES). An electron flood gun was used to switch the electrical polarity at the insulating surface to extract the interface-dipole contribution from the macroscopic dielectric polarization in the high-k/SiO{sub 2}/Si stack structure. TaO{sub 3}{sup −} nanosheet (TaNS) crystallites, which are a family of high-k tantalate materials deposited on the SiO{sub 2}/Si substrates, were annealed to prepare a nanoscale model interface. The properties of this interface were examined as a function of annealing temperature across the crystalline-to-amorphous transition. Macroscopic dielectric polarization of the TaNS/SiO{sub 2}/Si gate stack was found to exhibit a gradual decay that depended upon the quantum tunneling processes of induced carriers at the SiO{sub 2}/Si interface. Additionally, the dipole at the high-k/thin-SiO{sub 2} interface abruptly changed by ∼0.4 eV before and after annealing at 400 °C, which may be the result of a decrease in conduction-band offsets at the high-k/Si interface. Thus, SuCSES can aid in determining the inherent valence-band offsets in dielectric interfaces by using X-ray photoelectron spectroscopy with high accuracy and precision. Furthermore, SuCSES can determine whether dielectric polarization, including the interfacial dipole, affects the experimental value of the band offsets.

OSTI ID:
22590690
Journal Information:
Applied Physics Letters, Vol. 108, Issue 21; Other Information: (c) 2016 Author(s); Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
Country of Publication:
United States
Language:
English