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Title: Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors

Abstract

Cadmium zinc telluride (CdZnTe) detectors, as one of the principal detectors for the next-generation X-ray and γ-ray imagers, have high energy resolution and supporting electrode patterning in the radiation environment at room-temperature. In the present, a number of internationally renowned research institutions and universities are actively using these detector systems to carry out researches of energy spectrum analysis, medical imaging, materials characterization, high-energy physics, nuclear plant monitoring, and astrophysics. As the most important part of the readout system for the CdZnTe detector, the front-end readout application specific integrated circuit (ASIC) would have an important impact on the performances of the whole detector system. In order to ensure the small signal to noise ratio (SNR) and sufficient range of the output signal, it is necessary to design a front-end readout ASIC with very low noise and very high dynamic range. In addition, radiation hardness should be considered when the detectors are utilized in the space applications and high energy physics experiments. In this paper, we present measurements and performances of a novel multi-channel radiation-hardness low-noise front-end readout ASIC for CdZnTe detectors. The readout circuits in each channel consist of charge sensitive amplifier, leakage current compensation circuit (LCC), CR-RC shaper, S-K filter,more » inverse proportional amplifier, peak detect and hold circuit (PDH), discriminator and trigger logic, time sequence control circuit and driving buffer. All of 64 readout channels' outputs enter corresponding inputs of a 64 channel multiplexer. The output of the mux goes directly out of the chip via the output buffer. The 64-channel readout ASIC is implemented using the TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 2.7 mm x 8 mm. At room temperature, the equivalent noise level of a typical channel reaches 66 e{sup -} (rms) at zero farad for a power consumption of 8 mW per channel. The linearity error is lower than 1% and the overall gain of the readout channel is 165 V/pC. The crosstalk between the channels is less than 3%. By connecting the readout ASIC to a CdZnTe detector, we obtained a γ-ray spectrum, the energy resolution is 5.1% at the 59.5-keV line of {sup 241}Am source. (authors)« less

Authors:
; ; ; ;  [1]
  1. School of Computer Science and Technology, Northwestern Polytechnical University, Xi'an (China)
Publication Date:
Research Org.:
Institute of Electrical and Electronics Engineers - IEEE, 3 Park Avenue, 17th Floor, New York, N.Y. 10016-5997 (United States)
OSTI Identifier:
22531459
Report Number(s):
ANIMMA-2015-IO-77
TRN: US16V0485102400
Resource Type:
Conference
Resource Relation:
Conference: ANIMMA 2015: 4. International Conference on Advancements in Nuclear Instrumentation Measurement Methods and their Applications, Lisboa (Portugal), 20-24 Apr 2015; Other Information: Country of input: France
Country of Publication:
United States
Language:
English
Subject:
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; AMERICIUM 241; AMPLIFIERS; CADMIUM COMPOUNDS; DESIGN; ENERGY RESOLUTION; GAIN; GAMMA DETECTION; INTEGRATED CIRCUITS; KEV RANGE; LEAKAGE CURRENT; MULTIPLEXERS; NUCLEAR POWER PLANTS; RADIATION HARDNESS; READOUT SYSTEMS; SEMICONDUCTOR DETECTORS; SIGNAL-TO-NOISE RATIO; X RADIATION; X-RAY DETECTION; ZINC TELLURIDES

Citation Formats

Gan, Bo, Wei, Tingcun, Gao, Wu, Liu, Hui, and Hu, Yann. Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors. United States: N. p., 2015. Web. doi:10.1109/NSSMIC.2015.7582268.
Gan, Bo, Wei, Tingcun, Gao, Wu, Liu, Hui, & Hu, Yann. Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors. United States. doi:10.1109/NSSMIC.2015.7582268.
Gan, Bo, Wei, Tingcun, Gao, Wu, Liu, Hui, and Hu, Yann. Wed . "Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors". United States. doi:10.1109/NSSMIC.2015.7582268.
@article{osti_22531459,
title = {Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors},
author = {Gan, Bo and Wei, Tingcun and Gao, Wu and Liu, Hui and Hu, Yann},
abstractNote = {Cadmium zinc telluride (CdZnTe) detectors, as one of the principal detectors for the next-generation X-ray and γ-ray imagers, have high energy resolution and supporting electrode patterning in the radiation environment at room-temperature. In the present, a number of internationally renowned research institutions and universities are actively using these detector systems to carry out researches of energy spectrum analysis, medical imaging, materials characterization, high-energy physics, nuclear plant monitoring, and astrophysics. As the most important part of the readout system for the CdZnTe detector, the front-end readout application specific integrated circuit (ASIC) would have an important impact on the performances of the whole detector system. In order to ensure the small signal to noise ratio (SNR) and sufficient range of the output signal, it is necessary to design a front-end readout ASIC with very low noise and very high dynamic range. In addition, radiation hardness should be considered when the detectors are utilized in the space applications and high energy physics experiments. In this paper, we present measurements and performances of a novel multi-channel radiation-hardness low-noise front-end readout ASIC for CdZnTe detectors. The readout circuits in each channel consist of charge sensitive amplifier, leakage current compensation circuit (LCC), CR-RC shaper, S-K filter, inverse proportional amplifier, peak detect and hold circuit (PDH), discriminator and trigger logic, time sequence control circuit and driving buffer. All of 64 readout channels' outputs enter corresponding inputs of a 64 channel multiplexer. The output of the mux goes directly out of the chip via the output buffer. The 64-channel readout ASIC is implemented using the TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 2.7 mm x 8 mm. At room temperature, the equivalent noise level of a typical channel reaches 66 e{sup -} (rms) at zero farad for a power consumption of 8 mW per channel. The linearity error is lower than 1% and the overall gain of the readout channel is 165 V/pC. The crosstalk between the channels is less than 3%. By connecting the readout ASIC to a CdZnTe detector, we obtained a γ-ray spectrum, the energy resolution is 5.1% at the 59.5-keV line of {sup 241}Am source. (authors)},
doi = {10.1109/NSSMIC.2015.7582268},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2015},
month = {7}
}

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