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Title: Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress

Abstract

The high density of defect states at the dielectric/III-N interface in GaN based metal-insulator-semiconductor structures causes tremendous threshold voltage drifts, ΔV{sub th}, under forward gate bias conditions. A comprehensive study on different dielectric materials, as well as varying dielectric thickness t{sub D} and barrier thickness t{sub B}, is performed using capacitance-voltage analysis. It is revealed that the density of trapped electrons, ΔN{sub it}, scales with the dielectric capacitance under spill-over conditions, i.e., the accumulation of a second electron channel at the dielectric/AlGaN barrier interface. Hence, the density of trapped electrons is defined by the charging of the dielectric capacitance. The scaling behavior of ΔN{sub it} is explained universally by the density of accumulated electrons at the dielectric/III-N interface under spill-over conditions. We conclude that the overall density of interface defects is higher than what can be electrically measured, due to limits set by dielectric breakdown. These findings have a significant impact on the correct interpretation of threshold voltage drift data and are of relevance for the development of normally off and normally on III-N/GaN high electron mobility transistors with gate insulation.

Authors:
 [1];  [2]; ; ; ; ;  [1]; ; ; ;  [3];  [4]
  1. Infineon Technologies Austria AG, Siemensstraße 2, 9500 Villach (Austria)
  2. (Austria)
  3. Fraunhofer IPMS-CNT, Königsbrücker Straße 178, 01099 Dresden (Germany)
  4. Institute of Solid State Electronics, Vienna University of Technology, Floragasse 7, 1040 Wien (Austria)
Publication Date:
OSTI Identifier:
22311357
Resource Type:
Journal Article
Resource Relation:
Journal Name: Applied Physics Letters; Journal Volume: 105; Journal Issue: 3; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY; ALUMINIUM COMPOUNDS; BREAKDOWN; CAPACITANCE; CRYSTAL DEFECTS; DIELECTRIC MATERIALS; ELECTRIC POTENTIAL; ELECTRON MOBILITY; GALLIUM NITRIDES; INTERFACES; METALS; SCALING; SEMICONDUCTOR MATERIALS; THICKNESS; TRANSISTORS; TRAPPED ELECTRONS

Citation Formats

Lagger, P., E-mail: peter.lagger@infineon.com, Institute of Solid State Electronics, Vienna University of Technology, Floragasse 7, 1040 Wien, Steinschifter, P., Reiner, M., Stadtmüller, M., Denifl, G., Ostermaier, C., Naumann, A., Müller, J., Wilde, L., Sundqvist, J., and Pogany, D.. Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress. United States: N. p., 2014. Web. doi:10.1063/1.4891532.
Lagger, P., E-mail: peter.lagger@infineon.com, Institute of Solid State Electronics, Vienna University of Technology, Floragasse 7, 1040 Wien, Steinschifter, P., Reiner, M., Stadtmüller, M., Denifl, G., Ostermaier, C., Naumann, A., Müller, J., Wilde, L., Sundqvist, J., & Pogany, D.. Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress. United States. doi:10.1063/1.4891532.
Lagger, P., E-mail: peter.lagger@infineon.com, Institute of Solid State Electronics, Vienna University of Technology, Floragasse 7, 1040 Wien, Steinschifter, P., Reiner, M., Stadtmüller, M., Denifl, G., Ostermaier, C., Naumann, A., Müller, J., Wilde, L., Sundqvist, J., and Pogany, D.. Mon . "Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress". United States. doi:10.1063/1.4891532.
@article{osti_22311357,
title = {Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress},
author = {Lagger, P., E-mail: peter.lagger@infineon.com and Institute of Solid State Electronics, Vienna University of Technology, Floragasse 7, 1040 Wien and Steinschifter, P. and Reiner, M. and Stadtmüller, M. and Denifl, G. and Ostermaier, C. and Naumann, A. and Müller, J. and Wilde, L. and Sundqvist, J. and Pogany, D.},
abstractNote = {The high density of defect states at the dielectric/III-N interface in GaN based metal-insulator-semiconductor structures causes tremendous threshold voltage drifts, ΔV{sub th}, under forward gate bias conditions. A comprehensive study on different dielectric materials, as well as varying dielectric thickness t{sub D} and barrier thickness t{sub B}, is performed using capacitance-voltage analysis. It is revealed that the density of trapped electrons, ΔN{sub it}, scales with the dielectric capacitance under spill-over conditions, i.e., the accumulation of a second electron channel at the dielectric/AlGaN barrier interface. Hence, the density of trapped electrons is defined by the charging of the dielectric capacitance. The scaling behavior of ΔN{sub it} is explained universally by the density of accumulated electrons at the dielectric/III-N interface under spill-over conditions. We conclude that the overall density of interface defects is higher than what can be electrically measured, due to limits set by dielectric breakdown. These findings have a significant impact on the correct interpretation of threshold voltage drift data and are of relevance for the development of normally off and normally on III-N/GaN high electron mobility transistors with gate insulation.},
doi = {10.1063/1.4891532},
journal = {Applied Physics Letters},
number = 3,
volume = 105,
place = {United States},
year = {Mon Jul 21 00:00:00 EDT 2014},
month = {Mon Jul 21 00:00:00 EDT 2014}
}