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Title: Direct wafer bonding technology for large-scale InGaAs-on-insulator transistors

Abstract

Heterogeneous integration of III-V devices on Si wafers have been explored for realizing high device performance as well as merging electrical and photonic applications on the Si platform. Existing methodologies have unavoidable drawbacks such as inferior device quality or high cost in comparison with the current Si-based technology. In this paper, we present InGaAs-on-insulator (-OI) fabrication from an InGaAs layer grown on a Si donor wafer with a III-V buffer layer instead of growth on a InP donor wafer. This technology allows us to yield large wafer size scalability of III-V-OI layers up to the Si wafer size of 300 mm with a high film quality and low cost. The high film quality has been confirmed by Raman and photoluminescence spectra. In addition, the fabricated InGaAs-OI transistors exhibit the high electron mobility of 1700 cm{sup 2}/V s and uniform distribution of the leakage current, indicating high layer quality with low defect density.

Authors:
; ; ;  [1];  [2]; ;  [1]; ;  [3]
  1. Department of Electrical Engineering and Information Systems, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656 (Japan)
  2. (Japan)
  3. IntelliEPI, Inc., 1250 E. Collins Blvd., Richardson, Texas 75081 (United States)
Publication Date:
OSTI Identifier:
22311226
Resource Type:
Journal Article
Resource Relation:
Journal Name: Applied Physics Letters; Journal Volume: 105; Journal Issue: 4; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY; BUFFERS; CRYSTAL DEFECTS; DENSITY; DISTRIBUTION; ELECTRON MOBILITY; FILMS; GALLIUM ARSENIDES; INDIUM COMPOUNDS; LAYERS; LEAKAGE CURRENT; PHOTOLUMINESCENCE; SILICON; SPECTRA; SUBSTRATES; TRANSISTORS

Citation Formats

Kim, SangHyeon, E-mail: dadembyora@mosfet.t.u-tokyo.ac.jp, E-mail: sh-kim@kist.re.kr, Ikku, Yuki, Takenaka, Mitsuru, Takagi, Shinichi, JST-CREST, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Yokoyama, Masafumi, Nakane, Ryosho, Li, Jian, and Kao, Yung-Chung. Direct wafer bonding technology for large-scale InGaAs-on-insulator transistors. United States: N. p., 2014. Web. doi:10.1063/1.4891493.
Kim, SangHyeon, E-mail: dadembyora@mosfet.t.u-tokyo.ac.jp, E-mail: sh-kim@kist.re.kr, Ikku, Yuki, Takenaka, Mitsuru, Takagi, Shinichi, JST-CREST, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Yokoyama, Masafumi, Nakane, Ryosho, Li, Jian, & Kao, Yung-Chung. Direct wafer bonding technology for large-scale InGaAs-on-insulator transistors. United States. doi:10.1063/1.4891493.
Kim, SangHyeon, E-mail: dadembyora@mosfet.t.u-tokyo.ac.jp, E-mail: sh-kim@kist.re.kr, Ikku, Yuki, Takenaka, Mitsuru, Takagi, Shinichi, JST-CREST, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Yokoyama, Masafumi, Nakane, Ryosho, Li, Jian, and Kao, Yung-Chung. Mon . "Direct wafer bonding technology for large-scale InGaAs-on-insulator transistors". United States. doi:10.1063/1.4891493.
@article{osti_22311226,
title = {Direct wafer bonding technology for large-scale InGaAs-on-insulator transistors},
author = {Kim, SangHyeon, E-mail: dadembyora@mosfet.t.u-tokyo.ac.jp, E-mail: sh-kim@kist.re.kr and Ikku, Yuki and Takenaka, Mitsuru and Takagi, Shinichi and JST-CREST, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656 and Yokoyama, Masafumi and Nakane, Ryosho and Li, Jian and Kao, Yung-Chung},
abstractNote = {Heterogeneous integration of III-V devices on Si wafers have been explored for realizing high device performance as well as merging electrical and photonic applications on the Si platform. Existing methodologies have unavoidable drawbacks such as inferior device quality or high cost in comparison with the current Si-based technology. In this paper, we present InGaAs-on-insulator (-OI) fabrication from an InGaAs layer grown on a Si donor wafer with a III-V buffer layer instead of growth on a InP donor wafer. This technology allows us to yield large wafer size scalability of III-V-OI layers up to the Si wafer size of 300 mm with a high film quality and low cost. The high film quality has been confirmed by Raman and photoluminescence spectra. In addition, the fabricated InGaAs-OI transistors exhibit the high electron mobility of 1700 cm{sup 2}/V s and uniform distribution of the leakage current, indicating high layer quality with low defect density.},
doi = {10.1063/1.4891493},
journal = {Applied Physics Letters},
number = 4,
volume = 105,
place = {United States},
year = {Mon Jul 28 00:00:00 EDT 2014},
month = {Mon Jul 28 00:00:00 EDT 2014}
}