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Title: Transistor roadmap projection using predictive full-band atomistic modeling

Abstract

In this letter, a full band atomistic quantum transport tool is used to predict the performance of double gate metal-oxide-semiconductor field-effect transistors (MOSFETs) over the next 15 years for International Technology Roadmap for Semiconductors (ITRS). As MOSFET channel lengths scale below 20 nm, the number of atoms in the device cross-sections becomes finite. At this scale, quantum mechanical effects play an important role in determining the device characteristics. These quantum effects can be captured with the quantum transport tool. Critical results show the ON-current degradation as a result of geometry scaling, which is in contrast to previous ITRS compact model calculations. Geometric scaling has significant effects on the ON-current by increasing source-to-drain (S/D) tunneling and altering the electronic band structure. By shortening the device gate length from 20 nm to 5.1 nm, the ratio of S/D tunneling current to the overall subthreshold OFF-current increases from 18% to 98%. Despite this ON-current degradation by scaling, the intrinsic device speed is projected to increase at a rate of at least 8% per year as a result of the reduction of the quantum capacitance.

Authors:
;  [1];  [2];  [3]
  1. Network for Computational Nanotechnology and School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907 (United States)
  2. Intel Corporation, 2501 Northwest 229th Avenue, Hillsboro, Oregon 97124 (United States)
  3. Semiconductor Research Corporation (SRC), 1101 Slater Rd, Durham, North Carolina 27703 (United States)
Publication Date:
OSTI Identifier:
22310986
Resource Type:
Journal Article
Resource Relation:
Journal Name: Applied Physics Letters; Journal Volume: 105; Journal Issue: 8; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY; CAPACITANCE; CAPTURE; CROSS SECTIONS; METALS; MOSFET; OXIDES; QUANTUM MECHANICS; REDUCTION; SEMICONDUCTOR MATERIALS; SIMULATION; TUNNEL EFFECT

Citation Formats

Salmani-Jelodar, M., E-mail: m.salmani@gmail.com, Klimeck, G., Kim, S., and Ng, K. Transistor roadmap projection using predictive full-band atomistic modeling. United States: N. p., 2014. Web. doi:10.1063/1.4894217.
Salmani-Jelodar, M., E-mail: m.salmani@gmail.com, Klimeck, G., Kim, S., & Ng, K. Transistor roadmap projection using predictive full-band atomistic modeling. United States. doi:10.1063/1.4894217.
Salmani-Jelodar, M., E-mail: m.salmani@gmail.com, Klimeck, G., Kim, S., and Ng, K. Mon . "Transistor roadmap projection using predictive full-band atomistic modeling". United States. doi:10.1063/1.4894217.
@article{osti_22310986,
title = {Transistor roadmap projection using predictive full-band atomistic modeling},
author = {Salmani-Jelodar, M., E-mail: m.salmani@gmail.com and Klimeck, G. and Kim, S. and Ng, K.},
abstractNote = {In this letter, a full band atomistic quantum transport tool is used to predict the performance of double gate metal-oxide-semiconductor field-effect transistors (MOSFETs) over the next 15 years for International Technology Roadmap for Semiconductors (ITRS). As MOSFET channel lengths scale below 20 nm, the number of atoms in the device cross-sections becomes finite. At this scale, quantum mechanical effects play an important role in determining the device characteristics. These quantum effects can be captured with the quantum transport tool. Critical results show the ON-current degradation as a result of geometry scaling, which is in contrast to previous ITRS compact model calculations. Geometric scaling has significant effects on the ON-current by increasing source-to-drain (S/D) tunneling and altering the electronic band structure. By shortening the device gate length from 20 nm to 5.1 nm, the ratio of S/D tunneling current to the overall subthreshold OFF-current increases from 18% to 98%. Despite this ON-current degradation by scaling, the intrinsic device speed is projected to increase at a rate of at least 8% per year as a result of the reduction of the quantum capacitance.},
doi = {10.1063/1.4894217},
journal = {Applied Physics Letters},
number = 8,
volume = 105,
place = {United States},
year = {Mon Aug 25 00:00:00 EDT 2014},
month = {Mon Aug 25 00:00:00 EDT 2014}
}
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