Highly transparent low capacitance plasma enhanced atomic layer deposition Al{sub 2}O{sub 3}-HfO{sub 2} tunnel junction engineering
- INL, INSA, UMR CNRS 5270, 7 Avenue Jean Capelle, 69621 Villeurbanne Cedex (France)
- Laboratoire Nanotechnologies Nanosystèmes (LN2)-CNRS UMI-3463, Université de Sherbrooke, 3000 Boulevard Université, Sherbrooke, J1K OA5, Québec (Canada)
- ICTEAM, ELEN, UCL, Place du Levant 3, 1348 Louvain-la-Neuve (Belgium)
- Laboratoire Nanotechnologies Nanosystèmes (LN2)-CNRS UMI-3463, Université de Sherbrooke, 3000 Boulevard Université, Sherbrooke, J1K OA5, Québec, Canada and Institut Interdisciplinaire d'Innovation Technologique (3IT), Université de Sherbrooke, 3000 Boulevard Université, Sherbrooke, J1K OA5, Québec (Canada)
The development of metallic single electron transistor (SET) depends on the downscaling and the electrical properties of its tunnel junctions. These tunnel junctions should insure high tunnel current levels, low thermionic current, and low capacitance. The authors use atomic layer deposition to fabricate Al{sub 2}O{sub 3} and HfO{sub 2} thin layers. Tunnel barrier engineering allows the achievement of low capacitance Al{sub 2}O{sub 3} and HfO{sub 2} tunnel junctions using optimized annealing and plasma exposure conditions. Different stacks were designed and fabricated to increase the transparency of the tunnel junction while minimizing thermionic current. This tunnel junction is meant to be integrated in SET to enhance its electrical properties (e.g., operating temperature, I{sub ON}/I{sub OFF} ratio)
- OSTI ID:
- 22258559
- Journal Information:
- Journal of Vacuum Science and Technology. A, Vacuum, Surfaces and Films, Vol. 32, Issue 1; Other Information: (c) 2014 American Vacuum Society; Country of input: International Atomic Energy Agency (IAEA); ISSN 0734-2101
- Country of Publication:
- United States
- Language:
- English
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