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Gated ring oscillator with constant dynamic power consumption

Patent ·
OSTI ID:2222349
A pure digital ring oscillator with constant power consumption as oscillation frequency is adjusted. Circuit topology includes a multiplexer implemented in NAND gates and a delay element positioned after a path selection NAND gate of that multiplexer such that delay element transistors may not toggle if the non-delaying signal path is selected. Assuming a delay element oscillation frequency f and a total capacitance C, and also assuming a plurality N of delay gates each characterized by a propagation delay t1 and a capacitance C1 such that C=C1*N, the ring oscillator of the present invention is characterized by a C value that is proportional to N and an f value that is inversely proportional to N. Furthermore, each of the N delay gates as well as the input and output gates of the multiplexer are characterized by a common capacitance-to-propagation delay ratio=C1/t1.
Research Organization:
Fermi National Accelerator Laboratory (FNAL), Batavia, IL (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC02-07CH11359
Assignee:
Fermi Research Alliance, LLC (Batavia, IL)
Patent Number(s):
11,764,761
Application Number:
17/669,338
OSTI ID:
2222349
Country of Publication:
United States
Language:
English

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