On the electrical stress-induced oxide-trapped charges in thin HfO{sub 2}/SiO{sub 2} gate dielectric stack
- Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology, Clear Water Bay Road, Kowloon, Hong Kong (China)
Oxide charge buildup and its generation kinetics during constant voltage stress in TaN/HfO{sub 2}/SiO{sub 2}/p-Si structures have been experimentally investigated. From the oxide charge relaxation experiments, nature and energy location of the as-fabricated intrinsic hole traps in the gate stack have also been determined. Our measurement results indicate that the dispersive proton transport through the interfacial SiO{sub 2} contributes larger than hole trapping in positive charge buildup in the stack. From the bias temperature stress measurement results in both control oxide and HfO{sub 2}/SiO{sub 2} stacks, we have identified overcoordinated [Si{sub 2}=OH]{sup +} centers as the proton-induced defects located in the interfacial SiO{sub 2} layer of the stack. Finally, an empirical equation is proposed to explain the stress-induced oxide positive charge buildup.
- OSTI ID:
- 21016156
- Journal Information:
- Applied Physics Letters, Vol. 91, Issue 11; Other Information: DOI: 10.1063/1.2783967; (c) 2007 American Institute of Physics; Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
- Country of Publication:
- United States
- Language:
- English
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