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Title: On the interest of carbon-coated plasma reactor for advanced gate stack etching processes

Abstract

In integrated circuit fabrication the most wide spread strategy to achieve acceptable wafer-to-wafer reproducibility of the gate stack etching process is to dry-clean the plasma reactor walls between each wafer processed. However, inherent exposure of the reactor walls to fluorine-based plasma leads to formation and accumulation of nonvolatile fluoride residues (such as AlF{sub x}) on reactor wall surfaces, which in turn leads to process drifts and metallic contamination of wafers. To prevent this while keeping an Al{sub 2}O{sub 3} reactor wall material, a coating strategy must be used, in which the reactor is coated by a protective layer between wafers. It was shown recently that deposition of carbon-rich coating on the reactor walls allows improvements of process reproducibility and reactor wall protection. The authors show that this strategy results in a higher ion-to-neutral flux ratio to the wafer when compared to other strategies (clean or SiOCl{sub x}-coated reactors) because the carbon walls load reactive radical densities while keeping the same ion current. As a result, the etching rates are generally smaller in a carbon-coated reactor, but a highly anisotropic etching profile can be achieved in silicon and metal gates, whose etching is strongly ion assisted. Furthermore, thanks to the lowmore » density of Cl atoms in the carbon-coated reactor, silicon etching can be achieved almost without sidewall passivation layers, allowing fine critical dimension control to be achieved. In addition, it is shown that although the O atom density is also smaller in the carbon-coated reactor, the selectivity toward ultrathin gate oxides is not reduced dramatically. Furthermore, during metal gate etching over high-k dielectric, the low level of parasitic oxygen in the carbon-coated reactor also allows one to minimize bulk silicon reoxidation through HfO{sub 2} high-k gate dielectric. It is then shown that the BCl{sub 3} etching process of the HfO{sub 2} high-k material is highly selective toward the substrate in the carbon-coated reactor, and the carbon-coating strategy thus allows minimizing the silicon recess of the active area of transistors. The authors eventually demonstrate that the carbon-coating strategy drastically reduces on-wafer metallic contamination. Finally, the consumption of carbon from the reactor during the etching process is discussed (and thus the amount of initial deposit that is required to protect the reactor walls) together with the best way of cleaning the reactor after a silicon etching process.« less

Authors:
; ;  [1];  [2]
  1. Freescale Semiconductor Inc., 850 Rue Jean Monnet, 38921 Crolles Cedex (France) and Laboratoire des Technologies de la Microelectronique, CNRS, 17 Rue des Martyrs (c/o CEA-LETI), 38054 Grenoble Cedex 9 (France)
  2. (c/o CEA-LETI), 38054 Grenoble Cedex 9 (France)
Publication Date:
OSTI Identifier:
20979387
Resource Type:
Journal Article
Resource Relation:
Journal Name: Journal of Vacuum Science and Technology. A, International Journal Devoted to Vacuum, Surfaces, and Films; Journal Volume: 25; Journal Issue: 2; Other Information: DOI: 10.1116/1.2464126; (c) 2007 American Vacuum Society; Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
36 MATERIALS SCIENCE; ALUMINIUM OXIDES; BORON CHLORIDES; CARBON; DENSITY; DIELECTRIC MATERIALS; ETCHING; FLUORINE; HAFNIUM OXIDES; INTEGRATED CIRCUITS; IONS; PLASMA; PROTECTIVE COATINGS; SEMICONDUCTOR MATERIALS; SILICON; SURFACE CLEANING; SURFACE CONTAMINATION; THIN FILMS; WALLS

Citation Formats

Ramos, R., Cunge, G., Joubert, O., and Laboratoire des Technologies de la Microelectronique, CNRS, 17 Rue des Martyrs. On the interest of carbon-coated plasma reactor for advanced gate stack etching processes. United States: N. p., 2007. Web. doi:10.1116/1.2464126.
Ramos, R., Cunge, G., Joubert, O., & Laboratoire des Technologies de la Microelectronique, CNRS, 17 Rue des Martyrs. On the interest of carbon-coated plasma reactor for advanced gate stack etching processes. United States. doi:10.1116/1.2464126.
Ramos, R., Cunge, G., Joubert, O., and Laboratoire des Technologies de la Microelectronique, CNRS, 17 Rue des Martyrs. Thu . "On the interest of carbon-coated plasma reactor for advanced gate stack etching processes". United States. doi:10.1116/1.2464126.
@article{osti_20979387,
title = {On the interest of carbon-coated plasma reactor for advanced gate stack etching processes},
author = {Ramos, R. and Cunge, G. and Joubert, O. and Laboratoire des Technologies de la Microelectronique, CNRS, 17 Rue des Martyrs},
abstractNote = {In integrated circuit fabrication the most wide spread strategy to achieve acceptable wafer-to-wafer reproducibility of the gate stack etching process is to dry-clean the plasma reactor walls between each wafer processed. However, inherent exposure of the reactor walls to fluorine-based plasma leads to formation and accumulation of nonvolatile fluoride residues (such as AlF{sub x}) on reactor wall surfaces, which in turn leads to process drifts and metallic contamination of wafers. To prevent this while keeping an Al{sub 2}O{sub 3} reactor wall material, a coating strategy must be used, in which the reactor is coated by a protective layer between wafers. It was shown recently that deposition of carbon-rich coating on the reactor walls allows improvements of process reproducibility and reactor wall protection. The authors show that this strategy results in a higher ion-to-neutral flux ratio to the wafer when compared to other strategies (clean or SiOCl{sub x}-coated reactors) because the carbon walls load reactive radical densities while keeping the same ion current. As a result, the etching rates are generally smaller in a carbon-coated reactor, but a highly anisotropic etching profile can be achieved in silicon and metal gates, whose etching is strongly ion assisted. Furthermore, thanks to the low density of Cl atoms in the carbon-coated reactor, silicon etching can be achieved almost without sidewall passivation layers, allowing fine critical dimension control to be achieved. In addition, it is shown that although the O atom density is also smaller in the carbon-coated reactor, the selectivity toward ultrathin gate oxides is not reduced dramatically. Furthermore, during metal gate etching over high-k dielectric, the low level of parasitic oxygen in the carbon-coated reactor also allows one to minimize bulk silicon reoxidation through HfO{sub 2} high-k gate dielectric. It is then shown that the BCl{sub 3} etching process of the HfO{sub 2} high-k material is highly selective toward the substrate in the carbon-coated reactor, and the carbon-coating strategy thus allows minimizing the silicon recess of the active area of transistors. The authors eventually demonstrate that the carbon-coating strategy drastically reduces on-wafer metallic contamination. Finally, the consumption of carbon from the reactor during the etching process is discussed (and thus the amount of initial deposit that is required to protect the reactor walls) together with the best way of cleaning the reactor after a silicon etching process.},
doi = {10.1116/1.2464126},
journal = {Journal of Vacuum Science and Technology. A, International Journal Devoted to Vacuum, Surfaces, and Films},
number = 2,
volume = 25,
place = {United States},
year = {Thu Mar 15 00:00:00 EDT 2007},
month = {Thu Mar 15 00:00:00 EDT 2007}
}
  • In this work, the authors investigated the etching characteristics of TaN and HfO{sub 2} layers for gate stack patterning in BCl{sub 3}/Ar and BCl{sub 3}/C{sub 4}F{sub 8}/Ar inductively coupled plasmas and the effects of C{sub 4}F{sub 8} addition on the etch selectivity of the TaN to the HfO{sub 2} layer. Addition of C{sub 4}F{sub 8} gas to the BCl{sub 3}/Ar chemistry improved the TaN/HfO{sub 2} etch selectivity because adding the C{sub 4}F{sub 8} gas enhances the formation of the CF{sub x}Cl{sub y} passivation layer on HfO{sub 2} surface and decreased the HfO{sub 2} etch rate more rapidly than the TaNmore » etch rate in a disproportionate way. Reduction in the etch time for HfO{sub 2} layer also increases the TaN/HfO{sub 2} etch selectivity because the etch time gets closer to the initiation time for HfO{sub 2} etching.« less
  • The etch rate of TiN film and the selectivities of TiN/SiO{sub 2} and TiN/HfO{sub 2} were systematically investigated in Cl{sub 2}/BCl{sub 3}/Ar plasmas as functions of Cl{sub 2} flow rate, radio-frequency (rf) power, and direct-current (dc) bias voltage under different substrate temperatures of 10 and 80 degree sign C. The etch rate of TiN films increased with increasing Cl{sub 2} flow rate, rf power, and dc-bias voltage at a fixed substrate temperature. In addition, the etch rate of TiN films at 80 degree sign C were higher than that at 10 degree sign C when other plasma parameters were fixed.more » However, the selectivities of TiN/SiO{sub 2} and TiN/HfO{sub 2} showed different tendencies compared with etch-rate behavior as a function of rf power and dc bias voltage. The relative-volume densities of Ar (750.0 nm), Cl (725.2 nm), and Cl{sup +} (386.6 nm) were monitored with an optical-emission spectroscopy. When rf power increased, the relative-volume densities of all studied particles were increased. X-ray photoelectron spectroscopy was carried out to detect nonvolatile etch by-products from the surface, and nonvolatile peaks (TiCl{sub x} bonds) in Ti 2p and Cl 2p were observed due to their high melting points. Based on the experimental results, we can conclude that the TiN etch is dependent on the substrate temperature when other plasma parameters are fixed. This can be explained by the enhanced chemical pathway with the assistance of ion bombardment.« less
  • It was found that critical dimensions of high-k/metal gates obey the multivariate linear approximation with the precision of 3{sigma}={+-}0.86 nm, whose explanatory variables are amounts of metal compounds remaining on the plasma reactor walls. To measure their amounts, the authors assumed they are proportional to amounts of atoms sputtered out by Ar plasma and falling onto a Si wafers placed on a wafer stage. In this study, effects of metal compounds of W, Ti, Ta, and Hf, which are used to construct full-metal/high-k gates, were measured. It was found that Ti and Ta compounds dominate the fluctuation of critical dimensionsmore » and the dependency of their amount on wafer numbers being etched obeys a simple difference equation. From these results, they can estimate and minimize the fluctuations of critical dimensions in mass fabrications.« less
  • In this work, etching characteristics of TaN(200 nm)/HfO{sub 2}(80 nm) gate-stack structures on Si substrate were investigated by varying the process parameters such as BCl{sub 3}/(BCl{sub 3}+Ar+O{sub 2}) gas mixing ratio (Q), top-electrode power, dc self-bias voltage (V{sub dc}), and overetch time in an inductively coupled plasma etcher. To understand the role of the etch gas chemistry, we measure the relative changes in the optical emission intensity of ions and radicals in the plasma as well as in the chemical binding states of the etched TaN surfaces. We used optical emission spectroscopy and x-ray photoelectron spectroscopy respectively. The results showedmore » that BCl{sub 3}/Ar/O{sub 2} plasma is more effective in etching the oxidized TaN than Cl{sub 2}/Ar/O{sub 2} or HBr/Ar/O{sub 2} plasma. It is believed that the B radical species removes the oxygen atoms on the oxidized TaN surface more effectively by forming volatile boron-oxygen-chlorine compounds, such as trichloroboroxin (BOCl){sub 3}), boron oxychloride (BOCl), and boron dioxide. The measurement data also indicated that high etch selectivities of the TaN to the HfO{sub 2} layer could be obtained at the low V{sub dc}, high top-electrode power, and shorter overetch time.« less
  • The authors have fabricated combinatorial Ni-Ti-Pt ternary metal gate thin film libraries on HfO{sub 2} using magnetron co-sputtering to investigate flatband voltage shift ({delta}V{sub fb}), work function ({phi}{sub m}), and leakage current density (J{sub L}) variations. A more negative {delta}V{sub fb} is observed close to the Ti-rich corner than at the Ni- and Pt-rich corners, implying smaller {phi}{sub m} near the Ti-rich corners and higher {phi}{sub m} near the Ni- and Pt-rich corners. In addition, measured J{sub L} values can be explained consistently with the observed {phi}{sub m} variations. Combinatorial methodologies prove to be useful in surveying the large compositionalmore » space of ternary alloy metal gate electrode systems.« less