Fault-tolerant logical gate networks for Calderbank-Shor-Steane codes

Journal Article · Tue Nov 15 00:00:00 EST 2005 · Physical Review. A

DOI:https://doi.org/10.1103/PHYSREVA.72.0· OSTI ID:20786487

Steane, Andrew M; Ibinson, Ben ^[1]

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1. Centre for Quantum Computation, Department of Atomic and Laser Physics, University of Oxford, Clarendon Laboratory, Parks Road, Oxford OX1 3PU (United Kingdom)

Fault-tolerant logical operations for qubits encoded by Calderbank-Shor-Steane codes are discussed, with emphasis on methods that apply to codes of high rate, encoding k qubits per block with k>1. It is shown that the logical qubits within a given block can be prepared by a single recovery operation in any state whose stabilizer generator separates into X and Z parts. Optimized methods to move logical qubits around and to achieve controlled-NOT and Toffoli gates are discussed. It is found that the number of time steps required to complete a fault-tolerant quantum computation is the same when k>1 as when k=1.

• OSTI ID: 20786487
• Journal Information: Physical Review. A, Vol. 72, Issue 5; Other Information: DOI: 10.1103/PhysRevA.72.052335; (c) 2005 The American Physical Society; Country of input: International Atomic Energy Agency (IAEA); ISSN 1050-2947
• Country of Publication: United States
• Language: English

Related Subjects

74 ATOMIC AND MOLECULAR PHYSICS
GATING CIRCUITS
LOGIC CIRCUITS
OPERATION
QUANTUM COMPUTERS
QUANTUM MECHANICS
QUBITS