Scalable Deep Learning-Based Microarchitecture Simulation on GPUs

Li, Lingda; Pandey, Santosh; Li, L; Flynn, T; Hoisie, A; Liu, H

doi:10.1109/SC41404.2022.00084

Scalable Deep Learning-Based Microarchitecture Simulation on GPUs

Conference · 13 November 2022

DOI:https://doi.org/10.1109/SC41404.2022.00084· OSTI ID:1989626

Li, Lingda; Pandey, Santosh; Li, L; Flynn, T; Hoisie, A; Liu, H

Cycle-accurate microarchitecture simulators are essential tools for designers to architect, estimate, optimize, and manufacture new processors that meet specific design expectations. However, conventional simulators based on discrete-event methods often require an exceedingly long time-to-solution for the simulation of applications and architectures at full complexity and scale. Given the excitement around wielding the machine learning (ML) hammer to tackle various architecture problems, there have been attempts to employ ML to perform architecture simulations, such as Ithemal and SimNet. However, the direct application of existing ML approaches to architecture simulation may be even slower due to overwhelming memory traffic and stringent sequential computation logic. This work proposes the first graphics processing unit (GPU)-based microarchitecture simulator that fully unleashes the potential of GPUs to accelerate state-of-the-art ML-based simulators. First, considering the application traces are loaded from central processing unit (CPU) to GPU for simulation, we introduce various designs to reduce the data movement cost between CPUs and GPUs. Second, we propose a parallel simulation paradigm that partitions the application trace into sub-traces to simulate them in parallel with rigorous error analysis and effective error correction mechanisms. Combined, this scalable GPU-based simulator outperforms by orders of magnitude the traditional CPU-based simulators and the state-of-the-art ML-based simulators, i.e., SimNet and Ithemal.

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Research Organization:: Brookhaven National Laboratory (BNL), Upton, NY (United States)

Sponsoring Organization:: USDOE Office of Science (SC), Advanced Scientific Computing Research (SC-21); ~OTHER

DOE Contract Number:: SC0012704;

OSTI ID:: 1989626

Report Number(s):: BNL-224538-2023-COPA

Conference Information:: SC '22: The International Conference on High Performance Computing, Networking, Storage and Analysis, Dallas, TX, 11/13/2022 - 11/18/2022

Country of Publication:: United States

Language:: English

References (32)

Combining trace sampling with single pass methods for efficient cache simulation Conte, T. M.; Hirsch, M. A.; Hwu, W. -M. W. IEEE Transactions on Computers, Vol. 47, Issue 6 https://doi.org/10.1109/12.689650	journal	June 1998
SimpleScalar: an infrastructure for computer system modeling Austin, T.; Larson, E.; Ernst, D. Computer, Vol. 35, Issue 2 https://doi.org/10.1109/2.982917	journal	January 2002
Accelerating architectural simulation by parallel execution of trace samples Lauterbach, G. Proceedings of the Twenty-Seventh Hawaii International Conference on System Sciences HICSS-94 https://doi.org/10.1109/HICSS.1994.323171	conference	January 1994
Illustrative Design Space Studies with Microarchitectural Regression Models Lee, Benjamin C.; Brooks, David M. 2007 IEEE 13th International Symposium on High Performance Computer Architecture https://doi.org/10.1109/HPCA.2007.346211	conference	January 2007
Interval simulation: Raising the level of abstraction in architectural simulation Genbrugge, Davy; Eyerman, Stijn; Eeckhout, Lieven HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture https://doi.org/10.1109/HPCA.2010.5416636	conference	January 2010
NUAT: A non-uniform access time memory controller Shin, Wongyu; Yang, Jeongmin; Choi, Jungwhan 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA) https://doi.org/10.1109/HPCA.2014.6835956	conference	February 2014
GPGPU performance and power estimation using machine learning Wu, Gene; Greathouse, Joseph L.; Lyashevsky, Alexander 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA) https://doi.org/10.1109/HPCA.2015.7056063	conference	February 2015
Full Speed Ahead: Detailed Architectural Simulation at Near-Native Speed Sandberg, Andreas; Nikoleris, Nikos; Carlson, Trevor E. 2015 IEEE International Symposium on Workload Characterization https://doi.org/10.1109/IISWC.2015.29	conference	October 2015
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud Karandikar, Sagar; Mao, Howard; Kim, Donggyu 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA) https://doi.org/10.1109/ISCA.2018.00014	conference	June 2018
GPU Computing Owens, J. D.; Houston, M.; Luebke, D. Proceedings of the IEEE, Vol. 96, Issue 5 https://doi.org/10.1109/JPROC.2008.917757	journal	May 2008
MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research KleinOsowski, A. J.; Lilja, D. J. IEEE Computer Architecture Letters, Vol. 1, Issue 1 https://doi.org/10.1109/L-CA.2002.8	journal	January 2002
Predicting GPU Performance from CPU Runs Using Machine Learning Baldini, Ioana; Fink, Stephen J.; Altman, Erik 2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing https://doi.org/10.1109/SBAC-PAD.2014.30	conference	October 2014
C-SAW: A Framework for Graph Sampling and Random Walk on GPUs Pandey, Santosh; Li, Lingda; Hoisie, Adolfy SC20: International Conference for High Performance Computing, Networking, Storage and Analysis https://doi.org/10.1109/SC41405.2020.00060	conference	November 2020
Trust: Triangle Counting Reloaded on GPUs Pandey, Santosh; Wang, Zhibin; Zhong, Sheng IEEE Transactions on Parallel and Distributed Systems, Vol. 32, Issue 11 https://doi.org/10.1109/TPDS.2021.3064892	journal	November 2021
gSoFa: Scalable Sparse Symbolic LU Factorization on GPUs Gaihre, Anil; Li, Xiaoye Sherry; Liu, Hang IEEE Transactions on Parallel and Distributed Systems, Vol. 33, Issue 4 https://doi.org/10.1109/TPDS.2021.3090316	journal	April 2022
TurboSMARTS Wenisch, Thomas F.; Wunderlich, Roland E.; Falsafi, Babak Proceedings of the 2005 ACM SIGMETRICS international conference on Measurement and modeling of computer systems https://doi.org/10.1145/1064212.1064278	conference	June 2005
Efficiently exploring architectural design spaces via predictive modeling Ïpek, Engin; McKee, Sally A.; Caruana, Rich Proceedings of the 12th international conference on Architectural support for programming languages and operating systems https://doi.org/10.1145/1168857.1168882	conference	October 2006
Methods of inference and learning for performance modeling of parallel applications Lee, Benjamin C.; Brooks, David M.; de Supinski, Bronis R. Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming - PPoPP '07 https://doi.org/10.1145/1229428.1229479	conference	January 2007
An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness Hong, Sunpyo; Kim, Hyesoon Proceedings of the 36th annual international symposium on Computer architecture - ISCA '09 https://doi.org/10.1145/1555754.1555775	conference	January 2009
The gem5 simulator Binkert, Nathan; Sardashti, Somayeh; Sen, Rathijit ACM SIGARCH Computer Architecture News, Vol. 39, Issue 2 https://doi.org/10.1145/2024716.2024718	journal	August 2011
MARSS: a full system simulator for multicore x86 CPUs Patel, Avadh; Afram, Furat; Chen, Shunfei Proceedings of the 48th Design Automation Conference on - DAC '11 https://doi.org/10.1145/2024724.2024954	conference	January 2011
Evidence-based static branch prediction using machine learning Calder, Brad; Grunwald, Dirk; Jones, Michael ACM Transactions on Programming Languages and Systems, Vol. 19, Issue 1 https://doi.org/10.1145/239912.239923	journal	January 1997
ZSim Sanchez, Daniel; Kozyrakis, Christos ACM SIGARCH Computer Architecture News, Vol. 41, Issue 3 https://doi.org/10.1145/2508148.2485963	journal	June 2013
Cross-architecture performance prediction (XAPP) using CPU code to predict GPU performance Ardalani, Newsha; Lestourgeon, Clint; Sankaralingam, Karthikeyan Proceedings of the 48th International Symposium on Microarchitecture - MICRO-48 https://doi.org/10.1145/2830772.2830780	conference	January 2015
Accurate phase-level cross-platform power and performance estimation Zheng, Xinnian; John, Lizy K.; Gerstlauer, Andreas Proceedings of the 53rd Annual Design Automation Conference https://doi.org/10.1145/2897937.2897977	conference	June 2016
GPU Performance Estimation using Software Rasterization and Machine Learning O'neal, Kenneth; Brisk, Philip; Abousamra, Ahmed ACM Transactions on Embedded Computing Systems, Vol. 16, Issue 5s https://doi.org/10.1145/3126557	journal	September 2017
Spec Cpu2017 Bucek, James; Lange, Klaus-Dieter; v. Kistowski, Jóakim Companion of the 2018 ACM/SPEC International Conference on Performance Engineering https://doi.org/10.1145/3185768.3185771	conference	April 2018
SimNet Li, Lingda; Pandey, Santosh; Flynn, Thomas Proceedings of the ACM on Measurement and Analysis of Computing Systems, Vol. 6, Issue 2 https://doi.org/10.1145/3530891	journal	May 2022
Automatically characterizing large scale program behavior Sherwood, Timothy; Perelman, Erez; Hamerly, Greg Tenth international conference on architectural support for programming languages and operating systems on Proceedings of the 10th international conference on architectural support for programming languages and operating systems (ASPLOS-X) - ASPLOS '02 https://doi.org/10.1145/605402.605403	conference	January 2002
Using SimPoint for accurate and efficient simulation Perelman, Erez; Hamerly, Greg; Van Biesbrouck, Michael Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems - SIGMETRICS '03 https://doi.org/10.1145/781027.781076	conference	January 2003
Smarts Wunderlich, Roland E.; Wenisch, Thomas F.; Falsafi, Babak Proceedings of the 30th annual international symposium on Computer architecture - ISCA '03 https://doi.org/10.1145/859626.859629	conference	January 2003
A Simulator for Large-Scale Parallel Computer Architectures Janssen, Curtis L.; Adalsteinsson, Helgi; Cranford, Scott International Journal of Distributed Systems and Technologies, Vol. 1, Issue 2 https://doi.org/10.4018/jdst.2010040104	journal	April 2010

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