Nanometer scale nonvolatile memory device and method for storing binary and quantum memory states

Patent · 07 June 2022

OSTI ID:1893014

Xiao, Jun; Lindenberg, Aaron

Example implementations include an electronic memory device with a metallic layer having a first planar crystalline structure, a first encapsulating layer including an encapsulating material having a second planar crystalline structure, and disposed adjacent to a first planar surface of the metallic layer, and a second encapsulating layer including the encapsulating material, and disposed adjacent to a second planar surface of the metallic layer. Example implementations also include a method of depositing graphite crystals onto a substrate to form a gate bottom layer, depositing BN crystals onto the graphite bottom layer to form a BN bottom layer, depositing tungsten ditelluride (WTe2) crystals onto the BN bottom layer to form a metallic layer, depositing the BN crystals onto the BN bottom layer and the metallic layer to form a BN top layer, and depositing the graphite crystals onto the BN top layer to form a gate top layer.

• Research Organization: SLAC National Accelerator Laboratory (SLAC), Menlo Park, CA (United States)
• Sponsoring Organization: USDOE
• DOE Contract Number: AC02-76SF00515
• Assignee: The Board of Trustees of the Leland Stanford Junior University (Stanford, CA)
• Patent Number(s): 11,355,697
• Application Number: 17/103,710
• OSTI ID: 1893014
• Country of Publication: United States
• Language: English