PCIe write request acknowledgment

Title: PCIe write request acknowledgment

Abstract

A PCIe (Peripheral Component Interconnect Express) protocol converter for connection to a central processing unit (CPU) node having a root complex, a CPU memory fabric and CPU memory may include independent PCIe links, a fabric interface and a fabric switch connected to the fabric interface. Each of the links may include an endpoint for connection to the root complex. The fabric switch is connected to the fabric interface of each of the links and is connectable to a remote node. The fabric switch transmits writes of a single write request from the remote node across both links. Each fabric interface is to transmit an acknowledgment to the remote node in response to a write of the writes becoming observable at the CPU node hi Michael, hi Michael,.

Inventors:: Walker, Shawn K.; Sherlock, Derek A.; Gostin, Gary

Publication Date:: 2020-03-24

Research Org.:: Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1637805

Patent Number(s):: 10,599,598

Application Number:: 16/134,499

Assignee:: Hewlett Packard Enterprise Development LP (Houston, TX)

DOE Contract Number:: AC52-07NA27344

Resource Type:: Patent

Resource Relation:: Patent File Date: 09/18/2018

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Walker, Shawn K., Sherlock, Derek A., and Gostin, Gary. PCIe write request acknowledgment.  United States: N. p., 2020. 
        Web.

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                    Walker, Shawn K., Sherlock, Derek A., & Gostin, Gary. PCIe write request acknowledgment.  United States.

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                    Walker, Shawn K., Sherlock, Derek A., and Gostin, Gary. Tue .  
        "PCIe write request acknowledgment".  United States.  https://www.osti.gov/servlets/purl/1637805.

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@article{osti_1637805,

  title        = {PCIe write request acknowledgment},

  author       = {Walker, Shawn K. and Sherlock, Derek A. and Gostin, Gary},

  abstractNote = {A PCIe (Peripheral Component Interconnect Express) protocol converter for connection to a central processing unit (CPU) node having a root complex, a CPU memory fabric and CPU memory may include independent PCIe links, a fabric interface and a fabric switch connected to the fabric interface. Each of the links may include an endpoint for connection to the root complex. The fabric switch is connected to the fabric interface of each of the links and is connectable to a remote node. The fabric switch transmits writes of a single write request from the remote node across both links. Each fabric interface is to transmit an acknowledgment to the remote node in response to a write of the writes becoming observable at the CPU node hi Michael, hi Michael,.},

  doi          = {},

  url          = {https://www.osti.gov/biblio/1637805},
  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2020},

  month        = {3}

}

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Patent:

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Works referenced in this record:

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Similar Records

Title: PCIe write request acknowledgment

Abstract

Citation Formats

Peripheral component interconnect express (PCIe) hosts adapted to support remote PCIe endpoints patent, April 2018

Initializing shared memories for sharing endpoints across a plurality of root complexes patent, September 2012

Unified System Networking with CEE-PCIE Tunneling patent-application, June 2014

Unified system networking with CEE-PCIE tunneling patent, April 2015

Method, apparatus and system for integrating devices in a root complex patent, August 2017

Tracking a non-posted writes in a system using a storage location to store a write response indicator when the non-posted write has reached a target device patent, February 2006

Programmable memory controller patent, January 2012

Apparatus and method for managing digital resources by passing digital resource tokens between queues patent, June 1999

Unified system networking with CEE-PCIe tunneling patent, November 2014

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patent, April 2018

Initializing shared memories for sharing endpoints across a plurality of root complexes
patent, September 2012

Unified System Networking with CEE-PCIE Tunneling
patent-application, June 2014

Unified system networking with CEE-PCIE tunneling
patent, April 2015

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patent, August 2017

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patent, February 2006

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patent, November 2014