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Title: Improving reliability and reducing cost in CdTe photovoltaics via grain boundary engineering

Abstract

A key pathway toward achieving the SunShot 2030 goals for thin films devices is to increase the overall module efficiency and reliability. Photovoltaic devices based on polycrystalline CdTe thin films are the leading candidate, followed closely by Si, that have achieved the 2020 SunShot target of $0.05/kWh. However, to reach the goal for the levelized cost of electricity (LCOE) of less than $0.03/kWh by 2030, several fundamental problems of CdTe-based devices will need to be addressed: i) low Voc and conversion efficiencies of even the best research cell, ii) large variability of individual cell performances manufactured under identical conditions, and iii) degradation of cell performance within the first few years of operation in the field. Over the last 3 years, the PIs have utilized fundamental atomic-scale electronic- and crystal structure studies to develop an atomic-scale understanding of the role that grain boundaries play in limiting the performance in poly-crystalline CdTe thin film devices. More recently, these methods were also applied to poly-crystalline CdSeTe devices, where the role of Se and Cl co-passivation was examined. By developing an innovative multi-scale characterization and modeling approach, the PIs have leveraged their existing expertise in grain-boundary fabrication, atomic-resolution scanning transmission electron microscopy (STEM) characterization,more » and modeling to bridge the gap in our understanding of module performance and atomic-scale structure, composition, and charge carrier behavior. The major knowledge obtained about poly-crystalline CdSeTe absorber materials in this project are: We demonstrated that CdTe bi-crystals can serve as a valid model-system for state-of-the-art poly-crystalline thin films devices. We generalized our bi-crystal approach to develop a generalized grain-boundary model that can be used to improve device performance. Developed a library of potential passivants in both CdTe and CdsSeTe grain boundaries. Developed a 2-dimensional device transport model for CdTe devices that explicitly includes the role of grain boundaries and grain boundary passivation Data from this project contributed to the development of the FANTASTX (Fully Automated Nanoscale To Atomistic Structure from Theory and eXperiment) code, which allows structural resolution from STEM images and interatomic potentials. The development version of FANTASTX code is available, without charge, to users of the DOE-funded Center of Nanoscale Materials at Argonne National Laboratory. This project also funded the development of machine learning models specifically for finding impurity levels in Cd(Se,Te), and a 2-dimensional device level transport model that includes the roles of grain boundaries and interfacial passivation. The models resulting from this work will be made publicly available at a location to be announced in upcoming peer-reviewed publications describing the outcomes of this DOE funded project. This work sets the stage for developing a better understanding of homo, as well as hetero-interfacial properties and passivation in poly-crystalline CdSeTe devices. Such an effort will ultimately lead to the optimization of poly-crystalline CdTe devices approaching the theoretical limit of 30%.« less

Authors:
 [1];  [2];  [3];  [4];  [5]
  1. University of Illinois at Chicago
  2. Argonne National Lab. (ANL), Argonne, IL (United States). Center for Nanoscale Materials
  3. University of Texas - Dallas
  4. Colorado School of Mines, Golden, CO (United States)
  5. Bowling Green State Univ., OH (United States)
Publication Date:
Research Org.:
Univ. of Illinois at Urbana-Champaign, IL (United States)
Sponsoring Org.:
USDOE Office of Energy Efficiency and Renewable Energy (EERE), Renewable Power Office. Solar Energy Technologies Office
OSTI Identifier:
1574992
Report Number(s):
DOE-UIC-EE0007545
DOE Contract Number:  
EE0007545
Resource Type:
Technical Report
Country of Publication:
United States
Language:
English
Subject:
14 SOLAR ENERGY; CdTe, Electron Microscopy, Density Functional Theory, Machine Learning, Device Modeling

Citation Formats

Klie, Robert, Chan, Maria, Kim, Moon, Rockett, Angus, and Nardone, Marco. Improving reliability and reducing cost in CdTe photovoltaics via grain boundary engineering. United States: N. p., 2019. Web. doi:10.2172/1574992.
Klie, Robert, Chan, Maria, Kim, Moon, Rockett, Angus, & Nardone, Marco. Improving reliability and reducing cost in CdTe photovoltaics via grain boundary engineering. United States. doi:10.2172/1574992.
Klie, Robert, Chan, Maria, Kim, Moon, Rockett, Angus, and Nardone, Marco. Thu . "Improving reliability and reducing cost in CdTe photovoltaics via grain boundary engineering". United States. doi:10.2172/1574992. https://www.osti.gov/servlets/purl/1574992.
@article{osti_1574992,
title = {Improving reliability and reducing cost in CdTe photovoltaics via grain boundary engineering},
author = {Klie, Robert and Chan, Maria and Kim, Moon and Rockett, Angus and Nardone, Marco},
abstractNote = {A key pathway toward achieving the SunShot 2030 goals for thin films devices is to increase the overall module efficiency and reliability. Photovoltaic devices based on polycrystalline CdTe thin films are the leading candidate, followed closely by Si, that have achieved the 2020 SunShot target of $0.05/kWh. However, to reach the goal for the levelized cost of electricity (LCOE) of less than $0.03/kWh by 2030, several fundamental problems of CdTe-based devices will need to be addressed: i) low Voc and conversion efficiencies of even the best research cell, ii) large variability of individual cell performances manufactured under identical conditions, and iii) degradation of cell performance within the first few years of operation in the field. Over the last 3 years, the PIs have utilized fundamental atomic-scale electronic- and crystal structure studies to develop an atomic-scale understanding of the role that grain boundaries play in limiting the performance in poly-crystalline CdTe thin film devices. More recently, these methods were also applied to poly-crystalline CdSeTe devices, where the role of Se and Cl co-passivation was examined. By developing an innovative multi-scale characterization and modeling approach, the PIs have leveraged their existing expertise in grain-boundary fabrication, atomic-resolution scanning transmission electron microscopy (STEM) characterization, and modeling to bridge the gap in our understanding of module performance and atomic-scale structure, composition, and charge carrier behavior. The major knowledge obtained about poly-crystalline CdSeTe absorber materials in this project are: We demonstrated that CdTe bi-crystals can serve as a valid model-system for state-of-the-art poly-crystalline thin films devices. We generalized our bi-crystal approach to develop a generalized grain-boundary model that can be used to improve device performance. Developed a library of potential passivants in both CdTe and CdsSeTe grain boundaries. Developed a 2-dimensional device transport model for CdTe devices that explicitly includes the role of grain boundaries and grain boundary passivation Data from this project contributed to the development of the FANTASTX (Fully Automated Nanoscale To Atomistic Structure from Theory and eXperiment) code, which allows structural resolution from STEM images and interatomic potentials. The development version of FANTASTX code is available, without charge, to users of the DOE-funded Center of Nanoscale Materials at Argonne National Laboratory. This project also funded the development of machine learning models specifically for finding impurity levels in Cd(Se,Te), and a 2-dimensional device level transport model that includes the roles of grain boundaries and interfacial passivation. The models resulting from this work will be made publicly available at a location to be announced in upcoming peer-reviewed publications describing the outcomes of this DOE funded project. This work sets the stage for developing a better understanding of homo, as well as hetero-interfacial properties and passivation in poly-crystalline CdSeTe devices. Such an effort will ultimately lead to the optimization of poly-crystalline CdTe devices approaching the theoretical limit of 30%.},
doi = {10.2172/1574992},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2019},
month = {10}
}