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Title: High Voltage Cooling System for High Dissipation Power GaN Transistors

Abstract

In Phase I RadiaBeam explored cooling with structures using chemical vapor deposited diamond (CVDD) enabling high thermal conductivity with minimal contribution into the parasitic capacitance. The goal of the Phase I efforts is to demonstrate feasibility of a cooling system for a switching driver capable to operate GS66502B FET at several hundred volts, heat density deposition ~200 W/cm2, parasitic capacitance as low as ~pF, and FET temperatures below 60 °C. These conditions would allow operating the four-FET switch circuit at more than 30 MHz rep rate to produce nanosecond waveforms not distorted by deleterious effects related to overheating and parasitic electrical coupling.

Authors:
Publication Date:
Research Org.:
RadiaBeam Systems LLC
Sponsoring Org.:
USDOE Office of Science (SC)
OSTI Identifier:
1559815
Report Number(s):
DOE-RBS-18772
DOE Contract Number:  
SC0018772
Type / Phase:
SBIR (Phase I)
Resource Type:
Technical Report
Country of Publication:
United States
Language:
English

Citation Formats

Smirnov, Alexei. High Voltage Cooling System for High Dissipation Power GaN Transistors. United States: N. p., 2019. Web.
Smirnov, Alexei. High Voltage Cooling System for High Dissipation Power GaN Transistors. United States.
Smirnov, Alexei. Mon . "High Voltage Cooling System for High Dissipation Power GaN Transistors". United States.
@article{osti_1559815,
title = {High Voltage Cooling System for High Dissipation Power GaN Transistors},
author = {Smirnov, Alexei},
abstractNote = {In Phase I RadiaBeam explored cooling with structures using chemical vapor deposited diamond (CVDD) enabling high thermal conductivity with minimal contribution into the parasitic capacitance. The goal of the Phase I efforts is to demonstrate feasibility of a cooling system for a switching driver capable to operate GS66502B FET at several hundred volts, heat density deposition ~200 W/cm2, parasitic capacitance as low as ~pF, and FET temperatures below 60 °C. These conditions would allow operating the four-FET switch circuit at more than 30 MHz rep rate to produce nanosecond waveforms not distorted by deleterious effects related to overheating and parasitic electrical coupling.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2019},
month = {9}
}

Technical Report:
This technical report may be released as soon as September 2, 2023
Other availability
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