Thermal aware data placement and compute dispatch in a memory system
Patent
·
OSTI ID:1532082
A method of managing thermal levels in a memory system may include determining an expected thermal level associated with each of a plurality of locations in a memory structure, and for each operation of a plurality of operations addressed to the memory structure, assigning the operation to a target location of the plurality of physical locations in the memory structure based on a thermal penalty associated with the operation and the expected thermal level associated with the target location.
- Research Organization:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC52-07NA27344
- Assignee:
- Advanced Micro Devices, Inc. (Sunnyvale, CA)
- Patent Number(s):
- 9,947,386
- Application Number:
- 14/492,045
- OSTI ID:
- 1532082
- Country of Publication:
- United States
- Language:
- English
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