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Title: Stretchable Mould Interconnect Optimization: Peeling Automation and Carrierless Techniques

Abstract

The primary bottleneck of the stretchable mold interconnect (SMI) technology is its reliance on carrier boards. These are necessary to handle the meandered circuit during production and to ensure dimensional stability of the flexible circuit board before encapsulation. However, for all the problems it solves, it also introduces a new major problem by requiring a peeling step – which is difficult to automate. This manuscript aims to present some of the work that went into eliminating this problem, discussing both unsuccessful and functioning methods to tackle this conundrum and some of the experimental work that went into verifying these techniques. First, alterations to the design to simplify peeling are considered, followed by adhesivebased peeling processes and mechanical pin-based systems. Next, masking and structuring of the carrier board adhesive are considered. Finally, two carrierless methods which circumvent the problems are discussed, a two-step process – which cuts temporary support structures after partial encapsulation – and a technique whereby the frame is designed to fail in a controlled manner during the first use of the circuit, creating a carrierless process feasible for high-volume production.

Authors:
 [1]; ORCiD logo [2];  [1];  [1];  [1];  [1];  [1]
  1. Ghent University
  2. BATTELLE (PACIFIC NW LAB)
Publication Date:
Research Org.:
Pacific Northwest National Lab. (PNNL), Richland, WA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1530855
Report Number(s):
PNNL-SA-141175
DOE Contract Number:  
AC05-76RL01830
Resource Type:
Journal Article
Journal Name:
IEEE Transactions on Components, Packaging and Manufacturing Technology
Additional Journal Information:
Journal Volume: 9; Journal Issue: 5
Country of Publication:
United States
Language:
English

Citation Formats

Plovie, Bart, Yang, Yang, Dunphy, Sheila, Dhaenens, Kristof, Van Put, Steven, Bossuyt, Frederick, and Vanfleteren, Jan. Stretchable Mould Interconnect Optimization: Peeling Automation and Carrierless Techniques. United States: N. p., 2019. Web. doi:10.1109/TCPMT.2019.2906115.
Plovie, Bart, Yang, Yang, Dunphy, Sheila, Dhaenens, Kristof, Van Put, Steven, Bossuyt, Frederick, & Vanfleteren, Jan. Stretchable Mould Interconnect Optimization: Peeling Automation and Carrierless Techniques. United States. doi:10.1109/TCPMT.2019.2906115.
Plovie, Bart, Yang, Yang, Dunphy, Sheila, Dhaenens, Kristof, Van Put, Steven, Bossuyt, Frederick, and Vanfleteren, Jan. Wed . "Stretchable Mould Interconnect Optimization: Peeling Automation and Carrierless Techniques". United States. doi:10.1109/TCPMT.2019.2906115.
@article{osti_1530855,
title = {Stretchable Mould Interconnect Optimization: Peeling Automation and Carrierless Techniques},
author = {Plovie, Bart and Yang, Yang and Dunphy, Sheila and Dhaenens, Kristof and Van Put, Steven and Bossuyt, Frederick and Vanfleteren, Jan},
abstractNote = {The primary bottleneck of the stretchable mold interconnect (SMI) technology is its reliance on carrier boards. These are necessary to handle the meandered circuit during production and to ensure dimensional stability of the flexible circuit board before encapsulation. However, for all the problems it solves, it also introduces a new major problem by requiring a peeling step – which is difficult to automate. This manuscript aims to present some of the work that went into eliminating this problem, discussing both unsuccessful and functioning methods to tackle this conundrum and some of the experimental work that went into verifying these techniques. First, alterations to the design to simplify peeling are considered, followed by adhesivebased peeling processes and mechanical pin-based systems. Next, masking and structuring of the carrier board adhesive are considered. Finally, two carrierless methods which circumvent the problems are discussed, a two-step process – which cuts temporary support structures after partial encapsulation – and a technique whereby the frame is designed to fail in a controlled manner during the first use of the circuit, creating a carrierless process feasible for high-volume production.},
doi = {10.1109/TCPMT.2019.2906115},
journal = {IEEE Transactions on Components, Packaging and Manufacturing Technology},
number = 5,
volume = 9,
place = {United States},
year = {2019},
month = {5}
}