Hardware MPI message matching: Insights into MPI matching behavior to inform design: Hardware MPI message matching

doi:10.1002/cpe.5150

Title: Hardware MPI message matching: Insights into MPI matching behavior to inform design: Hardware MPI message matching

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Abstract

Here, this paper explores key differences of MPI match lists for several important United States Department of Energy (DOE) applications and proxy applications. This understanding is critical in determining the most promising hardware matching design for any given high-speed network. The results of MPI match list studies for the major open-source MPI implementations, MPICH and Open MPI, are presented, and we modify an MPI simulator, LogGOPSim, to provide match list statistics. These results are discussed in the context of several different potential design approaches to MPI matching–capable hardware. The data illustrate the requirements for different hardware designs in terms of performance and memory capacity. Finally, this paper's contributions are the collection and analysis of data to help inform hardware designers of common MPI requirements and highlight the difficulties in determining these requirements by only examining a single MPI implementation.

Authors:

Ferreira, Kurt ^[1]; Grant, Ryan E. ^[1]; Levenhagen, Michael J. ^[1];

^[1]; Groves, Taylor ^[2]

Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)

Publication Date:: 2019-02-27

Research Org.:: Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

Sponsoring Org.:: USDOE National Nuclear Security Administration (NNSA)

OSTI Identifier:: 1501630

Report Number(s):: SAND-2019-0943J
Journal ID: ISSN 1532-0626; 671923

Grant/Contract Number:: AC04-94AL85000; NA0003525; AC02‐05CH11231

Resource Type:: Journal Article: Accepted Manuscript

Journal Name:: Concurrency and Computation. Practice and Experience

Additional Journal Information:: Journal Name: Concurrency and Computation. Practice and Experience; Journal ID: ISSN 1532-0626

Publisher:: Wiley

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING; hardware matching; MPI; MPI matching

Citation Formats


                    Ferreira, Kurt, Grant, Ryan E., Levenhagen, Michael J., Levy, Scott, and Groves, Taylor. Hardware MPI message matching: Insights into MPI matching behavior to inform design: Hardware MPI message matching.  United States: N. p., 2019. 
        Web.  doi:10.1002/cpe.5150.

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                    Ferreira, Kurt, Grant, Ryan E., Levenhagen, Michael J., Levy, Scott, & Groves, Taylor. Hardware MPI message matching: Insights into MPI matching behavior to inform design: Hardware MPI message matching.  United States.  doi:10.1002/cpe.5150.

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                    Ferreira, Kurt, Grant, Ryan E., Levenhagen, Michael J., Levy, Scott, and Groves, Taylor. Wed .  
        "Hardware MPI message matching: Insights into MPI matching behavior to inform design: Hardware MPI message matching".  United States.  doi:10.1002/cpe.5150.

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@article{osti_1501630,

  title        = {Hardware MPI message matching: Insights into MPI matching behavior to inform design: Hardware MPI message matching},

  author       = {Ferreira, Kurt and Grant, Ryan E. and Levenhagen, Michael J. and Levy, Scott and Groves, Taylor},

  abstractNote = {Here, this paper explores key differences of MPI match lists for several important United States Department of Energy (DOE) applications and proxy applications. This understanding is critical in determining the most promising hardware matching design for any given high-speed network. The results of MPI match list studies for the major open-source MPI implementations, MPICH and Open MPI, are presented, and we modify an MPI simulator, LogGOPSim, to provide match list statistics. These results are discussed in the context of several different potential design approaches to MPI matching–capable hardware. The data illustrate the requirements for different hardware designs in terms of performance and memory capacity. Finally, this paper's contributions are the collection and analysis of data to help inform hardware designers of common MPI requirements and highlight the difficulties in determining these requirements by only examining a single MPI implementation.},

  doi          = {10.1002/cpe.5150},

  journal      = {Concurrency and Computation. Practice and Experience},

  issn         = {1532-0626},

  number       = ,

  volume       = ,

  place        = {United States},

  year         = {2019},

  month        = {2}

}

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