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Title: Integrated circuit physically unclonable function

Patent ·
OSTI ID:1487230

An integrated circuit (IC) based physically unclonable function (PUF) that comprises a common source amplifier for generating PUF output voltages, a unity gain, negative feedback operational amplifier for generating bias voltages, a voltage regulator and a bit exclusion circuit that excludes unstable PUF bits. Compensation circuitry built into the IC-PUF provides a high power supply rejection ratio and enables highly reliable operation of the IC-PUF across varying input voltages and operating temperatures. The IC-PUF generates a uniformly random output bit stream by taking advantage of process variations that are inherent to the fabrication of (metal-oxide semiconductor) MOS transistors.

Research Organization:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Organization:
USDOE National Nuclear Security Administration (NNSA)
DOE Contract Number:
NA0003525
Assignee:
National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)
Patent Number(s):
10,103,733
Application Number:
15/817,870
OSTI ID:
1487230
Resource Relation:
Patent File Date: 2017 Nov 20
Country of Publication:
United States
Language:
English

References (11)

Extracting secret keys from integrated circuits journal October 2005
Physical One-Way Functions journal September 2002
Physically unclonable function design patent May 2018
Cloning Physically Unclonable Functions conference June 2013
Physical Unclonable Functions for Device Authentication and Secret Key Generation conference June 2007
Solving the software protection problem with intrinsic personal physical unclonable functions. report September 2011
Comparison of bi-stable and delay-based Physical Unclonable Functions from measurements in 65nm bulk CMOS
  • Bhargava, Mudit; Cakir, Cagla; Mai, Ken
  • 2012 IEEE Custom Integrated Circuits Conference - CICC 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference https://doi.org/10.1109/CICC.2012.6330625
conference September 2012
Enabling SRAM-PUFs on Xilinx FPGAs conference September 2014
Attack resistant sense amplifier based PUFs (SA-PUF) with deterministic and controllable reliability of PUF responses conference June 2010
The arbiter-PUF with high uniqueness utilizing novel arbiter circuit with Delay-Time Measurement conference May 2011
Securing Trusted Execution Environments with PUF Generated Secret Keys conference June 2012