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Title: An FPGA-based Pattern Recognition Associative Memory

Abstract

Pattern recognition associative memory (PRAM) devices are parallel processing engines which are used to tackle the complex combinatorics of track nding algorithms, particularly for silicon based tracking triggers. PRAM development has been mostly limited to the realm of ASICs, which often leads to lengthy and expensive design cycles. FPGAs allow for quick iterations, making them an ideal hardware platform for designing and evaluating new PRAM features before committing to silicon. In this paper we present our FPGA-based PRAM designs and discuss how logic blocks which were originally developed for ASICs have been redesigned to take advantage of modern FPGA architectures.

Authors:
 [1];  [1];  [1];  [1];  [1];  [2]
  1. Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
  2. Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Peking Univ. Peking (China)
Publication Date:
Research Org.:
Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
Sponsoring Org.:
USDOE Office of Science (SC), High Energy Physics (HEP) (SC-25)
OSTI Identifier:
1480099
Report Number(s):
FERMILAB-TM-2681-PPD
1699915
DOE Contract Number:  
AC02-07CH11359
Resource Type:
Technical Report
Country of Publication:
United States
Language:
English
Subject:
43 PARTICLE ACCELERATORS

Citation Formats

Olsen, Jamieson, Liu, Tiehui Ted, Hoff, Jim, Hu, Zhen, Wu, Jim -Yuan, and Xu, Zijun. An FPGA-based Pattern Recognition Associative Memory. United States: N. p., 2018. Web. doi:10.2172/1480099.
Olsen, Jamieson, Liu, Tiehui Ted, Hoff, Jim, Hu, Zhen, Wu, Jim -Yuan, & Xu, Zijun. An FPGA-based Pattern Recognition Associative Memory. United States. doi:10.2172/1480099.
Olsen, Jamieson, Liu, Tiehui Ted, Hoff, Jim, Hu, Zhen, Wu, Jim -Yuan, and Xu, Zijun. Thu . "An FPGA-based Pattern Recognition Associative Memory". United States. doi:10.2172/1480099. https://www.osti.gov/servlets/purl/1480099.
@article{osti_1480099,
title = {An FPGA-based Pattern Recognition Associative Memory},
author = {Olsen, Jamieson and Liu, Tiehui Ted and Hoff, Jim and Hu, Zhen and Wu, Jim -Yuan and Xu, Zijun},
abstractNote = {Pattern recognition associative memory (PRAM) devices are parallel processing engines which are used to tackle the complex combinatorics of track nding algorithms, particularly for silicon based tracking triggers. PRAM development has been mostly limited to the realm of ASICs, which often leads to lengthy and expensive design cycles. FPGAs allow for quick iterations, making them an ideal hardware platform for designing and evaluating new PRAM features before committing to silicon. In this paper we present our FPGA-based PRAM designs and discuss how logic blocks which were originally developed for ASICs have been redesigned to take advantage of modern FPGA architectures.},
doi = {10.2172/1480099},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2018},
month = {7}
}

Technical Report:

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