skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Directive-Based, High-Level Programming and Optimizations for High-Performance Computing with FPGAs

Abstract

Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations from several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs have not been widely used for high-performance computing, primarily because of their programming complexity and difficulties in optimizing performance. In this paper, we present a directive-based, high-level optimization framework for high-performance computing with FPGAs, built on top of an OpenACC-to-FPGA translation framework called OpenARC. We propose directive extensions and correspond- ing compile-time optimization techniques to enable the compiler to generate more efficient FPGA hardware configuration files. Empirical evaluation of the proposed framework on an Intel Stratix V with five OpenACC benchmarks from various application domains shows that FPGA-specific optimizations can lead to significant increases in performance across all tested applications. We also demonstrate that applying these high-level directive-based optimizations can allow OpenACC applications to perform similarly to lower-level OpenCL applications with hand-written FPGA-specific optimizations, and offer runtime and power performance benefits compared to CPUs and GPUs.

Authors:
 [1]; ORCiD logo [2]; ORCiD logo [2]; ORCiD logo [2];  [1]
  1. University of Oregon
  2. ORNL
Publication Date:
Research Org.:
Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1474545
DOE Contract Number:  
AC05-00OR22725
Resource Type:
Conference
Resource Relation:
Conference: ACM International Conference on Supercomputing (ICS) - Beijing, , China - 6/12/2018 4:00:00 AM-6/15/2018 4:00:00 AM
Country of Publication:
United States
Language:
English

Citation Formats

Lambert, Jacob, Lee, Seyong, Kim, Jungwon, Vetter, Jeffrey S., and Malony, Allen. Directive-Based, High-Level Programming and Optimizations for High-Performance Computing with FPGAs. United States: N. p., 2018. Web. doi:10.1145/3205289.3205324.
Lambert, Jacob, Lee, Seyong, Kim, Jungwon, Vetter, Jeffrey S., & Malony, Allen. Directive-Based, High-Level Programming and Optimizations for High-Performance Computing with FPGAs. United States. doi:10.1145/3205289.3205324.
Lambert, Jacob, Lee, Seyong, Kim, Jungwon, Vetter, Jeffrey S., and Malony, Allen. Fri . "Directive-Based, High-Level Programming and Optimizations for High-Performance Computing with FPGAs". United States. doi:10.1145/3205289.3205324. https://www.osti.gov/servlets/purl/1474545.
@article{osti_1474545,
title = {Directive-Based, High-Level Programming and Optimizations for High-Performance Computing with FPGAs},
author = {Lambert, Jacob and Lee, Seyong and Kim, Jungwon and Vetter, Jeffrey S. and Malony, Allen},
abstractNote = {Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations from several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs have not been widely used for high-performance computing, primarily because of their programming complexity and difficulties in optimizing performance. In this paper, we present a directive-based, high-level optimization framework for high-performance computing with FPGAs, built on top of an OpenACC-to-FPGA translation framework called OpenARC. We propose directive extensions and correspond- ing compile-time optimization techniques to enable the compiler to generate more efficient FPGA hardware configuration files. Empirical evaluation of the proposed framework on an Intel Stratix V with five OpenACC benchmarks from various application domains shows that FPGA-specific optimizations can lead to significant increases in performance across all tested applications. We also demonstrate that applying these high-level directive-based optimizations can allow OpenACC applications to perform similarly to lower-level OpenCL applications with hand-written FPGA-specific optimizations, and offer runtime and power performance benefits compared to CPUs and GPUs.},
doi = {10.1145/3205289.3205324},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2018},
month = {6}
}

Conference:
Other availability
Please see Document Availability for additional information on obtaining the full-text document. Library patrons may search WorldCat to identify libraries that hold this conference proceeding.

Save / Share:

Works referenced in this record:

ScaleDeep: A Scalable Compute Architecture for Learning and Evaluating Deep Networks
journal, June 2017

  • Venkataramani, Swagath; Dubey, Pradeep; Raghunathan, Anand
  • ACM SIGARCH Computer Architecture News, Vol. 45, Issue 2
  • DOI: 10.1145/3140659.3080244

Using FPGA Devices to Accelerate Biomolecular Simulations
journal, March 2007

  • Alam, Sadaf R.; Agarwal, Pratul K.; Smith, Melissa C.
  • Computer, Vol. 40, Issue 3
  • DOI: 10.1109/MC.2007.108