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Title: Silicon compatible Sn-based resistive switching memory

Journal Article · · Nanoscale
DOI:https://doi.org/10.1039/c8nr01540f· OSTI ID:1461456
ORCiD logo [1];  [1];  [2];  [2];  [2];  [2];  [2];  [2];  [2];  [3];  [4];  [2];  [4];  [1]
  1. Argonne National Lab. (ANL), Argonne, IL (United States). Center for Nanoscale Materials; Univ. of Chicago, IL (United States). Inst. for Molecular Engineering
  2. Argonne National Lab. (ANL), Argonne, IL (United States). Center for Nanoscale Materials
  3. New Mexico Inst. of Mining and Technology, Socorro, NM (United States). Chemical Engineering and Materials Engineering Dept.
  4. Univ. of Notre Dame, IN (United States). Dept. of Electrical Engineering

Large banks of cheap, fast, non-volatile, energy efficient, scalable solid-state memories are an increasingly essential component for today's data intensive computing. Conductive-bridge random access memory (CBRAM) – which involves voltage driven formation and dissolution of Cu or Ag filaments in a Cu (or Ag) anode/dielectric (HfO2 or Al2O3)/inert cathode device – possesses the necessary attributes to fit the requirements. Cu and Ag are, however, fast diffusers and known contaminants in silicon microelectronics. In this paper, employing a criterion for electrode metal selection applicable to cationic filamentary devices and using first principles calculations for estimating diffusion barriers in HfO2, we identify tin (Sn) as a rational, silicon CMOS compatible replacement for Cu and Ag anodes in CBRAM devices. We then experimentally fabricate Sn based CBRAM devices and demonstrate very fast, steep-slope memory switching as well as threshold switching, comparable to Cu or Ag based devices. Furthermore, time evolution of the cationic filament formation along with the switching mechanism is discussed based on time domain measurements (I vs. t) carried out under constant voltage stress. Finally, the time to threshold is shown to be a function of both the voltage stress (Vstress) as well as the initial leakage current (I0) through the device.

Research Organization:
Argonne National Laboratory (ANL), Argonne, IL (United States); Univ. of Chicago, IL (United States)
Sponsoring Organization:
USDOE Office of Science (SC), Basic Energy Sciences (BES); National Science Foundation (NSF); Semiconductor Research Corporation (SRC) (United States)
Grant/Contract Number:
AC02-06CH11357; 1640081
OSTI ID:
1461456
Alternate ID(s):
OSTI ID: 1434172
Journal Information:
Nanoscale, Vol. 10, Issue 20; ISSN 2040-3364
Publisher:
Royal Society of ChemistryCopyright Statement
Country of Publication:
United States
Language:
English
Citation Metrics:
Cited by: 19 works
Citation information provided by
Web of Science

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Cited By (4)

Recent Advances of Quantum Conductance in Memristors journal November 2018
Controllable and Stable Quantized Conductance States in a Pt/HfO x /ITO Memristor journal November 2019
Spiking neuron circuits using superconducting quantum phase-slip junctions journal October 2018
Low-Power Resistive Switching Characteristic in HfO2/TiOx Bi-Layer Resistive Random-Access Memory journal May 2019

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