Solver for hardware based computing
Full-AC load flow constitutes a core computation in power system analysis. A performance gain with a hardware implementation of a sparse-linear solver using a Field Programmable Gate Array (FPGA) is achieved by use of a DC network emulation of the power system bus. Analog Behavioral Models (ABMs) are used in an efficient strategy for designing analog emulation engines for large-scale power system computation. A generator model is also developed using analog circuits for load flow emulation for power system analysis to reduce computation time. The generator model includes reconfigurable parameters using operational transconductance amplifiers (OTAs). The circuit module is used with other reconfigurable circuits, i.e., transmission lines and loads.
- Research Organization:
- Drexel Univ., Philadelphia, PA (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- FG02-03CH11171
- Assignee:
- Drexel University (Philadelphia, PA)
- Patent Number(s):
- 9,996,644
- Application Number:
- 14/956,461
- OSTI ID:
- 1457708
- Resource Relation:
- Patent File Date: 2015 Dec 02
- Country of Publication:
- United States
- Language:
- English
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