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Title: High Performance Parallel Processing (HPPP) Shallow Junction Devices Final Report CRADA No. TC-824-94B1

Abstract

Massively parallel computers, such as the Cray T3D, have historically supported resource sharing solely with space sharing. In that method, multiple problems are solved by executing them on distinct processors. This project developed a dynamic time- and space-sharing scheduler to achieve greater interactivity .and throughput than could be achieved with space-sharing alone. Cray Research Inc. (CRI) and LLNL worked together on the design, testing, and review aspects of.this project. · There were separate software deliverables. CRI implemented a general purpose scheduling system as per the design specifications. LLNL ported the local gang scheduler software to the LLNL Cray T3D. In this approach, processors are allocated simultaneously to all components of a parallel program (in a "gang"). Program execution is preempted as needed to provide for interactivity. Programs are also relocated to different processors as needed to efficiently pack the computer!s torus of processors.

Authors:
 [1];  [2]
  1. Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
  2. AT&T Bell Laboratories, Murray Hill, NY (United States)
Publication Date:
Research Org.:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1426088
Report Number(s):
LLNL-TR-746793
DOE Contract Number:  
AC52-07NA27344
Resource Type:
Technical Report
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

dela Rubia, T. D., and Gilmer, G. H. High Performance Parallel Processing (HPPP) Shallow Junction Devices Final Report CRADA No. TC-824-94B1. United States: N. p., 2018. Web. doi:10.2172/1426088.
dela Rubia, T. D., & Gilmer, G. H. High Performance Parallel Processing (HPPP) Shallow Junction Devices Final Report CRADA No. TC-824-94B1. United States. doi:10.2172/1426088.
dela Rubia, T. D., and Gilmer, G. H. Fri . "High Performance Parallel Processing (HPPP) Shallow Junction Devices Final Report CRADA No. TC-824-94B1". United States. doi:10.2172/1426088. https://www.osti.gov/servlets/purl/1426088.
@article{osti_1426088,
title = {High Performance Parallel Processing (HPPP) Shallow Junction Devices Final Report CRADA No. TC-824-94B1},
author = {dela Rubia, T. D. and Gilmer, G. H.},
abstractNote = {Massively parallel computers, such as the Cray T3D, have historically supported resource sharing solely with space sharing. In that method, multiple problems are solved by executing them on distinct processors. This project developed a dynamic time- and space-sharing scheduler to achieve greater interactivity .and throughput than could be achieved with space-sharing alone. Cray Research Inc. (CRI) and LLNL worked together on the design, testing, and review aspects of.this project. · There were separate software deliverables. CRI implemented a general purpose scheduling system as per the design specifications. LLNL ported the local gang scheduler software to the LLNL Cray T3D. In this approach, processors are allocated simultaneously to all components of a parallel program (in a "gang"). Program execution is preempted as needed to provide for interactivity. Programs are also relocated to different processors as needed to efficiently pack the computer!s torus of processors.},
doi = {10.2172/1426088},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2018},
month = {2}
}

Technical Report:

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