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Title: Establishment of a PID Pass/Fail Test for Crystalline Silicon Modules by Examining Field Performance for Five Years: Preprint

Abstract

In an experiment with five module designs and multiple replicas, it is found that crystalline silicon cell modules that can pass a criterion of less than 5 percent power degradation in stress test conditions of 60 degrees Celsius, 85 percent relative humidity (RH), 96 h, and nameplate-rated system voltage bias show no power degradation by potential induced degradation in the range of 4-6 years duration in the Florida, USA environment. This data suggests that this chamber stress level is useful as a pass/fail criterion for PID, and will help ensure against degradation by system voltage stress in Florida, or less stressful climates, for at least 5 years.

Authors:
 [1]
  1. National Renewable Energy Laboratory (NREL), Golden, CO (United States)
Publication Date:
Research Org.:
National Renewable Energy Lab. (NREL), Golden, CO (United States)
Sponsoring Org.:
USDOE Office of Energy Efficiency and Renewable Energy (EERE), Solar Energy Technologies Office (EE-4S)
OSTI Identifier:
1410972
Report Number(s):
NREL/CP-5J00-70264
DOE Contract Number:
AC36-08GO28308
Resource Type:
Conference
Resource Relation:
Conference: Presented at the 27th Workshop on Crystalline Silicon Solar Cells & Modules: Materials and Processes, 30 July - 2 August 2017, Breckenridge, Colorado
Country of Publication:
United States
Language:
English
Subject:
14 SOLAR ENERGY; 24 POWER TRANSMISSION AND DISTRIBUTION; potential-induced degradation; PID; system voltage; photovoltaic; modules; degradation; reliability durability

Citation Formats

Hacke, Peter L. Establishment of a PID Pass/Fail Test for Crystalline Silicon Modules by Examining Field Performance for Five Years: Preprint. United States: N. p., 2017. Web.
Hacke, Peter L. Establishment of a PID Pass/Fail Test for Crystalline Silicon Modules by Examining Field Performance for Five Years: Preprint. United States.
Hacke, Peter L. Mon . "Establishment of a PID Pass/Fail Test for Crystalline Silicon Modules by Examining Field Performance for Five Years: Preprint". United States. doi:. https://www.osti.gov/servlets/purl/1410972.
@article{osti_1410972,
title = {Establishment of a PID Pass/Fail Test for Crystalline Silicon Modules by Examining Field Performance for Five Years: Preprint},
author = {Hacke, Peter L},
abstractNote = {In an experiment with five module designs and multiple replicas, it is found that crystalline silicon cell modules that can pass a criterion of less than 5 percent power degradation in stress test conditions of 60 degrees Celsius, 85 percent relative humidity (RH), 96 h, and nameplate-rated system voltage bias show no power degradation by potential induced degradation in the range of 4-6 years duration in the Florida, USA environment. This data suggests that this chamber stress level is useful as a pass/fail criterion for PID, and will help ensure against degradation by system voltage stress in Florida, or less stressful climates, for at least 5 years.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Mon Nov 27 00:00:00 EST 2017},
month = {Mon Nov 27 00:00:00 EST 2017}
}

Conference:
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