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Title: Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses

Patent ·
OSTI ID:1375213

In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.

Research Organization:
GLOBALFOUNDRIES INC. Grand Cayman, KY (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
B554331
Assignee:
GLOBALFOUNDRIES INC.
Patent Number(s):
9,733,831
Application Number:
14/320,841
OSTI ID:
1375213
Resource Relation:
Patent File Date: 2014 Jul 01
Country of Publication:
United States
Language:
English

References (37)

GVT-NET--A Global Virtual Time Calculation Apparatus for Multi-Stage Networks patent October 1993
Barrier synchronization for distributed memory massively parallel processing systems patent July 1995
Apparatus and method for achieving reduced overhead mutual exclusion and maintaining coherency in a multiprocessor system utilizing execution history and thread monitoring patent August 1995
Processor structure and method for aggressively scheduling long latency instructions including load/store instructions while maintaining precise state patent July 1997
Method and apparatus for storing vector data in multiple non-consecutive locations in a data processor using a mask value patent April 1998
System and method for parallel execution of memory transactions using multiple memory models, including SSO, TSO, PSO and RMO patent April 1999
Digital filter processing device patent July 1999
Generation isolation system and method for garbage collection patent August 2000
Nested parallel language preprocessor for converting parallel language programs into sequential code patent August 2000
Cache coherency controller of cache memory for maintaining data anti-dependence when threads are executed in parallel patent September 2000
Replicated resource management system for managing resources in a distributed application and maintaining a relativistic view of state patent May 2001
Method, apparatus, and article of manufacture for facilitating resource management for applications having two types of program code patent June 2001
System for determining whether a subsequent transaction may be allowed or must be allowed or must not be allowed to bypass a preceding transaction patent February 2002
Synchronization using bus arbitration control for system analysis patent September 2003
Mechanism for folding storage barrier operations in a multiprocessor system patent April 2004
Method and apparatus for multithreaded processing of data in a programmable graphics processor patent March 2006
Specializing write-barriers for objects in a garbage collected heap patent August 2006
Apparatus and method of moving picture encoding employing a plurality of processors patent November 2007
Scalability of virtual TLBs for multi-processor virtual machines patent August 2010
Barrier synchronization method and apparatus for work-stealing threads patent May 2011
Replicated resource management system for managing resources in a distributed application and maintaining a relativistic view of state patent-application November 2001
Distributed shared memory system with variable granularity patent-application January 2002
Full multiprocessor speculation mechanism in a symmetric multiprocessor (smp) System patent-application July 2002
Multiprocessor system having distributed shared memory and instruction scheduling method used in the same system patent-application May 2003
Method and Apparatus for Converting a Lightweight Monitor to a Heavyweight Monitor patent-application May 2003
Method and apparatus for efficient and precise datarace detection for multithreaded object-oriented programs patent-application December 2003
Remembered-set scrubbing to remove stale entries in an incremental garbage collector patent-application September 2004
Memory barriers primitives in an asymmetric heterogeneous multiprocessor environment patent-application February 2006
Increasing data locality of recently accessed resources patent-application March 2006
Method and system for hardware based reporting of assertion information for emulation and hardware acceleration patent-application August 2006
System and method for adaptive garbage collection in a virtual machine environment patent-application October 2006
Memory consistency protection in a multiprocessor computing system patent-application June 2008
Distributed Loop Controller Architecture for Multi-threading in Uni-threaded Processors patent-application November 2008
Synchronisation patent-application January 2009
System and Method for Improving Run-Time Performance of Applications with Multithreaded and Single Threaded Routines patent-application February 2010
Translation-lookaside buffer consistency journal June 1990
A Burst Scheduling Access Reordering Mechanism conference February 2007

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