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Title: FInal Technical Repot of the Project: Design and Implementation of Low-Power 10Gb/s/channel Laser/Silicon Photonics Modulator Drivers with SEU Tolerance for HL-LHC

Abstract

During the funding period of this award from May 1, 2014 through March 30, 2016, we have accomplished the design, implementation and measurement results of two laser driver chips: LpGBLD10+ which is a low-power single-channel 10Gb/s laser driver IC, and LDQ10P, which is a 4x10Gb/s driver array chip for High Energy Physics (HEP) applications. With new circuit techniques, the driver consumes a record-low power consumption, 31 mW @10Gb/s/channel and occupies a small area of 400 µm × 1750 µm for the single-channel driver IC and 1900umx1700um for the LDQ10P chip. These characteristics allow for both the LpGBLD10+ ICs and LDQ10P suitable candidate for the Versatile Link PLUS (VL+) project, offering flexibility in configuring multiple Transmitters and receivers.

Authors:
 [1]
  1. Southern Methodist Univ., Dallas, TX (United States)
Publication Date:
Research Org.:
Southern Methodist Univ., Dallas, TX (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1374431
Report Number(s):
DOE-SMU-07830
DOE Contract Number:
SC0007830
Resource Type:
Technical Report
Country of Publication:
United States
Language:
English
Subject:
47 OTHER INSTRUMENTATION

Citation Formats

Gui, Ping. FInal Technical Repot of the Project: Design and Implementation of Low-Power 10Gb/s/channel Laser/Silicon Photonics Modulator Drivers with SEU Tolerance for HL-LHC. United States: N. p., 2017. Web. doi:10.2172/1374431.
Gui, Ping. FInal Technical Repot of the Project: Design and Implementation of Low-Power 10Gb/s/channel Laser/Silicon Photonics Modulator Drivers with SEU Tolerance for HL-LHC. United States. doi:10.2172/1374431.
Gui, Ping. Wed . "FInal Technical Repot of the Project: Design and Implementation of Low-Power 10Gb/s/channel Laser/Silicon Photonics Modulator Drivers with SEU Tolerance for HL-LHC". United States. doi:10.2172/1374431. https://www.osti.gov/servlets/purl/1374431.
@article{osti_1374431,
title = {FInal Technical Repot of the Project: Design and Implementation of Low-Power 10Gb/s/channel Laser/Silicon Photonics Modulator Drivers with SEU Tolerance for HL-LHC},
author = {Gui, Ping},
abstractNote = {During the funding period of this award from May 1, 2014 through March 30, 2016, we have accomplished the design, implementation and measurement results of two laser driver chips: LpGBLD10+ which is a low-power single-channel 10Gb/s laser driver IC, and LDQ10P, which is a 4x10Gb/s driver array chip for High Energy Physics (HEP) applications. With new circuit techniques, the driver consumes a record-low power consumption, 31 mW @10Gb/s/channel and occupies a small area of 400 µm × 1750 µm for the single-channel driver IC and 1900umx1700um for the LDQ10P chip. These characteristics allow for both the LpGBLD10+ ICs and LDQ10P suitable candidate for the Versatile Link PLUS (VL+) project, offering flexibility in configuring multiple Transmitters and receivers.},
doi = {10.2172/1374431},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Wed Aug 09 00:00:00 EDT 2017},
month = {Wed Aug 09 00:00:00 EDT 2017}
}

Technical Report:

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