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Title: Three-phase Four-leg Inverter LabVIEW FPGA Control Code

Abstract

In the area of power electronics control, Field Programmable Gate Arrays (FPGAs) have the capability to outperform their Digital Signal Processor (DSP) counterparts due to the FPGA’s ability to implement true parallel processing and therefore facilitate higher switching frequencies, higher control bandwidth, and/or enhanced functionality. National Instruments (NI) has developed two platforms, Compact RIO (cRIO) and Single Board RIO (sbRIO), which combine a real-time processor with an FPGA. The FPGA can be programmed with a subset of the well-known LabVIEW graphical programming language. The use of cRIO and sbRIO for power electronics control has developed over the last few years to include control of three-phase inverters. Most three-phase inverter topologies include three switching legs. The addition of a fourth-leg to natively generate the neutral connection allows the inverter to serve single-phase loads in a microgrid or stand-alone power system and to balance the three-phase voltages in the presence of significant load imbalance. However, the control of a four-leg inverter is much more complex. In particular, instead of standard two-dimensional space vector modulation (SVM), the inverter requires three-dimensional space vector modulation (3D-SVM). The candidate software implements complete control algorithms in LabVIEW FPGA for a three-phase four-leg inverter. The software includes feedbackmore » control loops, three-dimensional space vector modulation gate-drive algorithms, advanced alarm handling capabilities, contactor control, power measurements, and debugging and tuning tools. The feedback control loops allow inverter operation in AC voltage control, AC current control, or DC bus voltage control modes based on external mode selection by a user or supervisory controller. The software includes the ability to synchronize its AC output to the grid or other voltage-source before connection. The software also includes provisions to allow inverter operation in parallel with other voltage regulating devices on the AC or DC buses. This flexibility allows the Inverter to operate as a stand-alone voltage source, connected to the grid, or in parallel with other controllable voltage sources as part of a microgrid or remote power system. In addition, as the inverter is expected to operate under severe unbalanced conditions, the software includes algorithms to accurately compute real and reactive power for each phase based on definitions provided in the IEEE Standard 1459: IEEE Standard Definitions for the Measurement of Electric Power Quantities Under Sinusoidal, Nonsinusoidal, Balanced, or Unbalanced Conditions. Finally, the software includes code to output analog signals for debugging and for tuning of control loops. The software fits on the Xilinx Virtex V LX110 FPGA embedded in the NI cRIO-9118 FPGA chassis, and with a 40 MHz base clock, supports a modulation update rate of 40 MHz, user-settable switching frequencies and synchronized control loop update rates of tens of kHz, and reference waveform generation, including Phase Lock Loop (PLL), update rate of 100 kHz.« less

Publication Date:
Research Org.:
National Renewable Energy Lab. (NREL), Golden, CO (United States)
Sponsoring Org.:
US Department of Defense U.S. Army Rapid Equipping Force
OSTI Identifier:
1373270
Report Number(s):
CUBE (Three-phase Four-leg Inverter LabVIEW FPGA); 005379MLTPL00
SWR 16-26
DOE Contract Number:
AC36-08GO28308
Resource Type:
Software
Software Revision:
00
Software Package Number:
005379
Software CPU:
MLTPL
Source Code Available:
No
Country of Publication:
United States

Citation Formats

. Three-phase Four-leg Inverter LabVIEW FPGA Control Code. Computer software. Vers. 00. US Department of Defense U.S. Army Rapid Equipping Force. 15 Aug. 2016. Web.
. (2016, August 15). Three-phase Four-leg Inverter LabVIEW FPGA Control Code (Version 00) [Computer software].
. Three-phase Four-leg Inverter LabVIEW FPGA Control Code. Computer software. Version 00. August 15, 2016.
@misc{osti_1373270,
title = {Three-phase Four-leg Inverter LabVIEW FPGA Control Code, Version 00},
author = {},
abstractNote = {In the area of power electronics control, Field Programmable Gate Arrays (FPGAs) have the capability to outperform their Digital Signal Processor (DSP) counterparts due to the FPGA’s ability to implement true parallel processing and therefore facilitate higher switching frequencies, higher control bandwidth, and/or enhanced functionality. National Instruments (NI) has developed two platforms, Compact RIO (cRIO) and Single Board RIO (sbRIO), which combine a real-time processor with an FPGA. The FPGA can be programmed with a subset of the well-known LabVIEW graphical programming language. The use of cRIO and sbRIO for power electronics control has developed over the last few years to include control of three-phase inverters. Most three-phase inverter topologies include three switching legs. The addition of a fourth-leg to natively generate the neutral connection allows the inverter to serve single-phase loads in a microgrid or stand-alone power system and to balance the three-phase voltages in the presence of significant load imbalance. However, the control of a four-leg inverter is much more complex. In particular, instead of standard two-dimensional space vector modulation (SVM), the inverter requires three-dimensional space vector modulation (3D-SVM). The candidate software implements complete control algorithms in LabVIEW FPGA for a three-phase four-leg inverter. The software includes feedback control loops, three-dimensional space vector modulation gate-drive algorithms, advanced alarm handling capabilities, contactor control, power measurements, and debugging and tuning tools. The feedback control loops allow inverter operation in AC voltage control, AC current control, or DC bus voltage control modes based on external mode selection by a user or supervisory controller. The software includes the ability to synchronize its AC output to the grid or other voltage-source before connection. The software also includes provisions to allow inverter operation in parallel with other voltage regulating devices on the AC or DC buses. This flexibility allows the Inverter to operate as a stand-alone voltage source, connected to the grid, or in parallel with other controllable voltage sources as part of a microgrid or remote power system. In addition, as the inverter is expected to operate under severe unbalanced conditions, the software includes algorithms to accurately compute real and reactive power for each phase based on definitions provided in the IEEE Standard 1459: IEEE Standard Definitions for the Measurement of Electric Power Quantities Under Sinusoidal, Nonsinusoidal, Balanced, or Unbalanced Conditions. Finally, the software includes code to output analog signals for debugging and for tuning of control loops. The software fits on the Xilinx Virtex V LX110 FPGA embedded in the NI cRIO-9118 FPGA chassis, and with a 40 MHz base clock, supports a modulation update rate of 40 MHz, user-settable switching frequencies and synchronized control loop update rates of tens of kHz, and reference waveform generation, including Phase Lock Loop (PLL), update rate of 100 kHz.},
doi = {},
year = 2016,
month = 8,
note =
}

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  • In the area of power electronics control, Field Programmable Gate Arrays (FPGAs) have the capability to outperform their Digital Signal Processor (DSP) counterparts due to the FPGA’s ability to implement true parallel processing and therefore facilitate higher switching frequencies, higher control bandwidth, and/or enhanced functionality. National Instruments (NI) has developed two platforms, Compact RIO (cRIO) and Single Board RIO (sbRIO), which combine a real-time processor with an FPGA. The FPGA can be programmed with a subset of the well-known LabVIEW graphical programming language. The candidate software implements complete control algorithms in LabVIEW FPGA for a DC Transformer (DCX) based onmore » a dual active bridge (DAB). A DCX is an isolated bi-directional DC-DC converter designed to operate at unity conversion ratio, M, defined by where Vin is the primary-side DC bus voltage, Vout is the secondary-side DC bus voltage, and n is the turns ratio of the embedded high frequency transformer (HFX). The DCX based on a DAB incorporates two H-bridges, a resonant inductor, and an HFX to provide this functionality. The candidate software employs phase-shift modulation of the two H-bridges and a feedback loop to regulate the conversion ratio at unity. The software also includes alarm-handling capabilities as well as debugging and tuning tools. The software fits on the Xilinx Virtex V LX110 FPGA embedded in the NI cRIO-9118 FPGA chassis, and with a 40 MHz base clock, supports a modulation update rate of 40 MHz, and user-settable switching frequencies and synchronized control loop update rates of tens of kHz.« less
  • This paper investigates the PWM operation of a four switch three phase inverter (FSTPI), in the case of digital implementation. Different switching sequence strategies for vector control are described and a digital scalar method is also presented. The influence of different switching patterns on the output voltage symmetry, current waveform and switching frequency are examined. The results obtained by employing the vector and scalar strategies are compared and a relationship between them is established. This comparison is based on analytical study and is corroborated either by the computer simulations and by the experimental results. The vector approach makes ease themore » understanding and analysis of the FSTPI, as well the choice of a PWM pattern. However, similar results may be obtained through the scalar approach, which has a simpler implementation. The experimental results of the use of the FSTPI and digital PWM to control an induction motor are presented.« less
  • This paper proposes a method of three phase voltage control sinusoidal PWM (Pulse Width Modulation) inverter. The state equation of the inverter main circuit has been derived and transformed to the d-q frame. Afterwards, an algorithm of dead-beat control has been developed by considering only the load current as disturbing variable. The advantage of dead-beat control is that it can control very fast within short time (sampling period) comparing to other methods. The main objective of the controller design is to get the sinusoidal voltage at inverter`s output with low harmonic distortions. To compensate the calculation delay and to realizemore » physically, a 3d order prediction method has been adopted. A new switching technique has been developed. This switching technique can reduce unnecessary switching so that switching loss can be minimized. Finally, simulations has been done under a typical load condition (rectifier with capacitor load) and harmonic analysis has also been done. Throughout all simulations, very good results have been found where total harmonic distortions (THD) is less than 5%.« less
  • The discrete-time control of a three-phase inverter with an output LC filter is described based on space vectors. The mathematical model of the inverter-filter system is first obtained by using space vectors to represent three-phase quantities. Deadbeat control laws are derived for no-load and resistive-load cases. Then, a deadbeat control law is obtained for the case when the load draws current of any waveshape from the inverter-filter. It is shown that deadbeat control of output voltage can be achieved in two control steps. The manipulated variable, which is the voltage vector demanded from the inverter, is implemented using the spacemore » vector modulation technique. Simulation results for various operating conditions are presented.« less

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