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Title: A low-power, CMOS peak detect and hold circuit for nuclear pulse spectroscopy

Journal Article · · IEEE Transactions on Nuclear Science
DOI:https://doi.org/10.1109/23.467886· OSTI ID:136893
; ;  [1];  [2];  [3];
  1. Oak Ridge National Lab., TN (United States)
  2. Univ. of Tennessee, Knoxville, TN (United States)
  3. Naval Research Lab., Washington, DC (United States)

A low-power CMOS peak detecting track and hold circuit optimized for nuclear pulse spectroscopy is presented. The circuit topology eliminates the need for a rectifying diode, reducing the effect of charge injection into the hold capacitor, incorporates a linear gate at the input to prevent pulse pileup, and uses dynamic bias control that minimizes both pedestal and droop. Both positive-going and negative-going pulses are accommodated using a complementary set of track and hold circuits. Full characterization of the design fabricated in 1.2 {micro}m CMOS including dynamic range, integral nonlinearity, droop rate, pedestal, and power measurements is presented. The circuit operates with only 250 {micro}m for input pulses with 7 {micro}s peaking time. Power consumption was increased to 750 {micro}w for driving off-chip and test system capacitances. Analysis and design approaches for optimization of operational characteristics are also discussed.

DOE Contract Number:
AC05-84OR21400
OSTI ID:
136893
Report Number(s):
CONF-941061-; ISSN 0018-9499; TRN: 96:000995
Journal Information:
IEEE Transactions on Nuclear Science, Vol. 42, Issue 4Pt1; Conference: Institute of Electrical and Electronic Engineers (IEEE) nuclear science symposium and medical imaging conference, Norfolk, VA (United States), 30 Oct - 5 Nov 1994; Other Information: PBD: Aug 1995
Country of Publication:
United States
Language:
English

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