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Title: The Address in Real Time Data Driver Card for the 1 MicroMegas Detector of the ATLAS Muon Upgrade

Publication Date:
Research Org.:
Brookhaven National Laboratory (BNL), Upton, NY (United States). Atlas
Sponsoring Org.:
USDOE Office of Science (SC), High Energy Physics (HEP) (SC-25)
OSTI Identifier:
Report Number(s):
R&D Project: PO 024; KA2501032
DOE Contract Number:
Resource Type:
Resource Relation:
Conference: TWEPP 2016 - Topical Workshop on Electronics for Particle Physics; Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany; 20160926 through 20160930
Country of Publication:
United States

Citation Formats

Yao L., and ATLAS Collaboration. The Address in Real Time Data Driver Card for the 1 MicroMegas Detector of the ATLAS Muon Upgrade. United States: N. p., 2016. Web.
Yao L., & ATLAS Collaboration. The Address in Real Time Data Driver Card for the 1 MicroMegas Detector of the ATLAS Muon Upgrade. United States.
Yao L., and ATLAS Collaboration. Mon . "The Address in Real Time Data Driver Card for the 1 MicroMegas Detector of the ATLAS Muon Upgrade". United States. doi:.
title = {The Address in Real Time Data Driver Card for the 1 MicroMegas Detector of the ATLAS Muon Upgrade},
author = {Yao L. and ATLAS Collaboration},
abstractNote = {},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Mon Sep 26 00:00:00 EDT 2016},
month = {Mon Sep 26 00:00:00 EDT 2016}

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  • The ATLAS collaboration at LHC has chosen the Micromegas (Micro Mesh Gaseous Structure) technology along with the small-strip Thin Gap Chambers (sTGC) for the high luminosity upgrade of the inner muon station in the high-rapidity region, the so called New Small Wheel (NSW). It employs eight layers of Micromegas detectors and eight layers of sTGC. The NSW project requires fully efficient Micromegas chambers with spatial resolution down to 100 μm in the precision coordinate for momentum reconstruction, and at mm level in the azimuthal (second) coordinate, over a total active area of 1200 m{sup 2}, with a rate capability upmore » to about 15 kHz/cm{sup 2} and operation in a moderate magnetic field up to B = 0.4 T. The required tracking capability is provided by the intrinsic space resolution combined with a mechanical precision at the level of 30 μm along the precision coordinate. Together with the precise tracking capability the Micromegas chambers should provide a trigger signal. Several tests have been performed on small (10x10 cm{sup 2}) and large (1 x 1 m{sup 2}) size single gap chambers prototypes using high energy hadron beams at CERN, low and intermediate energy (0.5-5 GeV) electron beams at Frascati and DESY, neutron beams at Demokritos (Athens) and Garching (Munich) and cosmic rays. More recently two quadruplets with dimensions 1.2 x 0.5 m{sup 2} and the same configuration and structure foreseen for the NSW upgrade have been built at CERN and tested with high energy pions/muons beam. Results obtained in the most recent tests, in different configurations and operating conditions, in dependence with the magnetic field, will be presented, along with a comparison between different read-out electronics, either based on the APV25 chips, or based on a new digital front-end ASIC developed in its second version (VMM2) as a new prototype of the final chip that will be employed in the NSW upgrade. (authors)« less
  • Large area Micromegas detectors will be employed for the first time in high-energy physics experiments. A total surface of about 150 m{sup 2} of the forward regions of the Muon Spectrometer of the ATLAS detector at LHC will be equipped with 8-layer Micromegas modules. Each module extends over a surface from 2 to 3 m{sup 2} for a total active area of 1200 m{sup 2}. Together with the small strip Thin Gap Chambers they will compose the two New Small Wheels, which will replace the innermost stations of the ATLAS end-cap muon tracking system in the 2018/19 shutdown. In ordermore » to achieve a 15% transverse momentum resolution for 1 TeV muons, in addition to an excellent intrinsic resolution, the mechanical precision of each plane of the assembled module must be as good as 30 μm along the precision coordinate and 80 μm perpendicular to the chamber. In the prototyping towards the final configuration two similar quadruplets with dimensions 1.2 x 0.5 m{sup 2} have been built with the same structure as foreseen for the NSW upgrade. It represents the first example of a Micromegas quadruplet ever built, realized using the resistive-strip technology and decoupling the amplification mesh from the readout structure. All readout planes are segmented into strips with a pitch of 400 μm for a total of 4096 strips. In two of the four planes the strips are inclined by 1.5 deg. and provide a measurement of the second coordinate. The design and construction procedure of the Micromegas modules will be presented, as well as the design for the assembly of modules onto the New Small Wheel. Emphasis will be given on the methods developed to achieve the challenging mechanical precision. Measurements of deformation on chamber prototypes as a function of thermal gradients, gas over-pressure and internal stress (mesh tension and module fixation on supports) will be also shown in comparison to simulation. These tests were essential in the development of the final design in order to minimize the effects of deformations. During installation and operation all deformations and relative misalignments will be monitored through an optical alignment system and compensated in the tracking software. The optical alignment concept will also be outlined. 2 (authors)« less
  • This paper presents a real-time application of the 16-bit fixed point Digital Signal Processors (DSPs), in the Muon System of the D0 detector located at the Fermilab Tevatron, presently the world's highest-energy hadron collider. As part of the Upgrade for a run beginning in the year 2000, the system is required to process data at an input event rate of 10 KHz without incurring significant deadtime in readout. The ADSP21csp01 processor has high I/O bandwidth, single cycle instruction execution and fast task switching support to provide efficient multisignal processing. The processor's internal memory consists of 4K words of Program Memorymore » and 4K words of Data Memory. In addition there is an external memory of 32K words for general event buffering and 16K words of Dual port Memory for input data queuing. This DSP fulfills the requirement of the Muon subdetector systems for data readout. All error handling, buffering, formatting and transferring of the data to the various trigger levels of the data acquisition system is done in software. The algorithms developed for the system complete these tasks in about 20 {micro}s per event.« less
  • The LHC upgrade scheduled for 2018 is expected to significantly increase the accelerator's luminosity, and as a result the radiation background rates in the ATLAS Muon Spectrometer will increase too. Some of its components will have to be replaced in order to cope with these high rates. Newly designed small-strip Thin Gap chambers (sTGC) will replace them at the small wheel region. One of the differences between the sTGC and the currently used TGC is the alignment of the wires along the azimuthal direction. As a result, the outermost wires approach the detector's edge with a small angle. Such amore » configuration may be a cause for various problems. Two small dedicated chambers were built and tested in order to study possible edge effects that may arise from the new configuration. The sTGC appears to be stable and no spark have been observed, yet some differences in the detector response near the edge is seen and further studies should be carried out. (authors)« less