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Title: Method of making a silicon nanowire device

Abstract

There is provided an electronic device and a method for its manufacture. The device comprises an elongate silicon nanowire less than 0.5 .mu.m in cross-sectional dimensions and having a hexagonal cross-sectional shape due to annealing-induced energy relaxation. The method, in examples, includes thinning the nanowire through iterative oxidation and etching of the oxidized portion.

Inventors:
Publication Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1358226
Patent Number(s):
9,660,026
Application Number:
15/354,196
Assignee:
Sandia Corporation SNL-A
DOE Contract Number:
AC04-94AL85000
Resource Type:
Patent
Resource Relation:
Patent File Date: 2016 Nov 17
Country of Publication:
United States
Language:
English
Subject:
36 MATERIALS SCIENCE

Citation Formats

None, None. Method of making a silicon nanowire device. United States: N. p., 2017. Web.
None, None. Method of making a silicon nanowire device. United States.
None, None. 2017. "Method of making a silicon nanowire device". United States. doi:. https://www.osti.gov/servlets/purl/1358226.
@article{osti_1358226,
title = {Method of making a silicon nanowire device},
author = {None, None},
abstractNote = {There is provided an electronic device and a method for its manufacture. The device comprises an elongate silicon nanowire less than 0.5 .mu.m in cross-sectional dimensions and having a hexagonal cross-sectional shape due to annealing-induced energy relaxation. The method, in examples, includes thinning the nanowire through iterative oxidation and etching of the oxidized portion.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = 2017,
month = 5
}

Patent:

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  • There is provided an electronic device and a method for its manufacture. The device comprises an elongate silicon nanowire less than 0.5 .mu.m in cross-sectional dimensions and having a hexagonal cross-sectional shape due to annealing-induced energy relaxation.
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  • The invention is directed to a hydrogenated amorphous silicon PIN semiconductor device of hybrid glow discharge/reactive sputtering fabrication. The hybrid fabrication method is of advantage in providing an ability to control the optical band gap of the P and N layers, resulting in increased photogeneration of charge carriers and device output.
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