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Title: Integrated Avalanche Photodiode arrays

Abstract

The present disclosure includes devices for detecting photons, including avalanche photon detectors, arrays of such detectors, and circuits including such arrays. In some aspects, the detectors and arrays include a virtual beveled edge mesa structure surrounded by resistive material damaged by ion implantation and having side wall profiles that taper inwardly towards the top of the mesa structures, or towards the direction from which the ion implantation occurred. Other aspects are directed to masking and multiple implantation and/or annealing steps. Furthermore, methods for fabricating and using such devices, circuits and arrays are disclosed.

Inventors:
Publication Date:
Research Org.:
LightSpin Technologies, Inc. Endicott, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1351819
Patent Number(s):
9,627,569
Application Number:
14/718,352
Assignee:
LightSpin Technologies, Inc. CHO
DOE Contract Number:  
SC0009538
Resource Type:
Patent
Resource Relation:
Patent File Date: 2015 May 21
Country of Publication:
United States
Language:
English
Subject:
47 OTHER INSTRUMENTATION; 36 MATERIALS SCIENCE

Citation Formats

Harmon, Eric S. Integrated Avalanche Photodiode arrays. United States: N. p., 2017. Web.
Harmon, Eric S. Integrated Avalanche Photodiode arrays. United States.
Harmon, Eric S. Tue . "Integrated Avalanche Photodiode arrays". United States. doi:. https://www.osti.gov/servlets/purl/1351819.
@article{osti_1351819,
title = {Integrated Avalanche Photodiode arrays},
author = {Harmon, Eric S.},
abstractNote = {The present disclosure includes devices for detecting photons, including avalanche photon detectors, arrays of such detectors, and circuits including such arrays. In some aspects, the detectors and arrays include a virtual beveled edge mesa structure surrounded by resistive material damaged by ion implantation and having side wall profiles that taper inwardly towards the top of the mesa structures, or towards the direction from which the ion implantation occurred. Other aspects are directed to masking and multiple implantation and/or annealing steps. Furthermore, methods for fabricating and using such devices, circuits and arrays are disclosed.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Apr 18 00:00:00 EDT 2017},
month = {Tue Apr 18 00:00:00 EDT 2017}
}

Patent:

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