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Title: Integrated Performance of a Frequency Domain Multiplexing Readout in the SPT-3G Receiver

Authors:
; ; ; ; ; ; ; ; ; ; ; ; ; ; ;
Publication Date:
Research Org.:
Argonne National Lab. (ANL), Argonne, IL (United States)
Sponsoring Org.:
USDOE Office of Science (SC); Gordon and Betty Moore Foundation; National Science Foundation (NSF)
OSTI Identifier:
1295615
DOE Contract Number:
AC02-06CH11357
Resource Type:
Conference
Resource Relation:
Conference: 2016 SPIE Astronomical Telescopes and Instrumentation, 06/26/16 - 07/01/16, Edinburgh, Scotland, GB
Country of Publication:
United States
Language:
English

Citation Formats

Bender, A. N., Ade, P. A. R., Anderson, A. J., Avva, J., Ahmed, Z., Arnold, K., Austermann, J. E., Basu Thakur, R., Benson, B. A., Bleem, L. E., Byrum, K., Carlstrom, J. E., Carter, F. W., Chang, C. L., Wang, G., and Yefremenko, V. Integrated Performance of a Frequency Domain Multiplexing Readout in the SPT-3G Receiver. United States: N. p., 2016. Web. doi:10.1117/12.2232146.
Bender, A. N., Ade, P. A. R., Anderson, A. J., Avva, J., Ahmed, Z., Arnold, K., Austermann, J. E., Basu Thakur, R., Benson, B. A., Bleem, L. E., Byrum, K., Carlstrom, J. E., Carter, F. W., Chang, C. L., Wang, G., & Yefremenko, V. Integrated Performance of a Frequency Domain Multiplexing Readout in the SPT-3G Receiver. United States. doi:10.1117/12.2232146.
Bender, A. N., Ade, P. A. R., Anderson, A. J., Avva, J., Ahmed, Z., Arnold, K., Austermann, J. E., Basu Thakur, R., Benson, B. A., Bleem, L. E., Byrum, K., Carlstrom, J. E., Carter, F. W., Chang, C. L., Wang, G., and Yefremenko, V. 2016. "Integrated Performance of a Frequency Domain Multiplexing Readout in the SPT-3G Receiver". United States. doi:10.1117/12.2232146.
@article{osti_1295615,
title = {Integrated Performance of a Frequency Domain Multiplexing Readout in the SPT-3G Receiver},
author = {Bender, A. N. and Ade, P. A. R. and Anderson, A. J. and Avva, J. and Ahmed, Z. and Arnold, K. and Austermann, J. E. and Basu Thakur, R. and Benson, B. A. and Bleem, L. E. and Byrum, K. and Carlstrom, J. E. and Carter, F. W. and Chang, C. L. and Wang, G. and Yefremenko, V.},
abstractNote = {},
doi = {10.1117/12.2232146},
journal = {},
number = ,
volume = ,
place = {United States},
year = 2016,
month = 7
}

Conference:
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  • The development of planar fabrication techniques for superconducting transition-edge sensors has brought large-scale arrays of 1000 pixels or more to the realm of practicality. This raises the problem of reading out a large number of sensors with a tractable number of connections. A possible solution is frequency-domain multiplexing. I summarize basic principles, present various circuit topologies, and discuss design trade-offs, noise performance, cross-talk and dynamic range. The design of a practical device and its readout system is described with a discussion of fabrication issues, practical limits and future prospects.
  • The development of planar fabrication techniques for superconducting transition-edge sensors has brought large-scale arrays of 1000 pixels or more to the realm of practicality. This raises the problem of reading out a large number of sensors with a tractable number of connections. A possible solution is frequency-domain multiplexing. I summarize basic principles, present various circuit topologies, and discuss design trade-offs, noise performance, cross-talk and dynamic range. The design of a practical device and its readout system is described with a discussion of fabrication issues, practical limits and future prospects.
  • This paper presents an integrated time- and-frequency-domain technique for characterization and modeling of parasitic effects associated with interconnects. This technique enables direct measurements of critical transient as well as frequency responses of interconnects; accurate and efficient SPICE model extraction for coupled lines; and cross-domain verification of the measured data as well as the extracted models. To illustrate its application this technique is applied to characterize and extract the equivalent circuit model of the I/O bus on a real-world printed circuit board.
  • Abstract not provided.