Comparator circuits with local ramp buffering for a column-parallel single slope ADC
Patent
·
OSTI ID:1248813
A comparator circuit suitable for use in a column-parallel single-slope analog-to-digital converter comprises a comparator, an input voltage sampling switch, a sampling capacitor arranged to store a voltage which varies with an input voltage when the sampling switch is closed, and a local ramp buffer arranged to buffer a global voltage ramp applied at an input. The comparator circuit is arranged such that its output toggles when the buffered global voltage ramp exceeds the stored voltage. Both DC- and AC-coupled comparator embodiments are disclosed.
- Research Organization:
- Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC04-94AL85000;
- Assignee:
- TELEDYNE SCIENTIFIC & IMAGING, LLC (Thousand Oaks, CA)
- Patent Number(s):
- 9,325,335
- Application Number:
- 14/523,179
- OSTI ID:
- 1248813
- Country of Publication:
- United States
- Language:
- English
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