Scaling Support Vector Machines On Modern HPC Platforms
Abstract
We designed and implemented MIC-SVM, a highly efficient parallel SVM for x86 based multicore and many-core architectures, such as the Intel Ivy Bridge CPUs and Intel Xeon Phi co-processor (MIC). We propose various novel analysis methods and optimization techniques to fully utilize the multilevel parallelism provided by these architectures and serve as general optimization methods for other machine learning tools.
- Authors:
- Publication Date:
- Research Org.:
- Pacific Northwest National Lab. (PNNL), Richland, WA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1184976
- Report Number(s):
- PNNL-SA-105673
KJ0402000
- DOE Contract Number:
- AC05-76RL01830
- Resource Type:
- Journal Article
- Journal Name:
- Journal of Parallel and Distributed Computing, 76:16-31
- Additional Journal Information:
- Journal Name: Journal of Parallel and Distributed Computing, 76:16-31
- Country of Publication:
- United States
- Language:
- English
Citation Formats
You, Yang, Fu, Haohuan, Song, Shuaiwen, Randles, Amanda, Kerbyson, Darren J., Marquez, Andres, Yang, Guangwen, and Hoisie, Adolfy. Scaling Support Vector Machines On Modern HPC Platforms. United States: N. p., 2015.
Web. doi:10.1016/j.jpdc.2014.09.005.
You, Yang, Fu, Haohuan, Song, Shuaiwen, Randles, Amanda, Kerbyson, Darren J., Marquez, Andres, Yang, Guangwen, & Hoisie, Adolfy. Scaling Support Vector Machines On Modern HPC Platforms. United States. https://doi.org/10.1016/j.jpdc.2014.09.005
You, Yang, Fu, Haohuan, Song, Shuaiwen, Randles, Amanda, Kerbyson, Darren J., Marquez, Andres, Yang, Guangwen, and Hoisie, Adolfy. 2015.
"Scaling Support Vector Machines On Modern HPC Platforms". United States. https://doi.org/10.1016/j.jpdc.2014.09.005.
@article{osti_1184976,
title = {Scaling Support Vector Machines On Modern HPC Platforms},
author = {You, Yang and Fu, Haohuan and Song, Shuaiwen and Randles, Amanda and Kerbyson, Darren J. and Marquez, Andres and Yang, Guangwen and Hoisie, Adolfy},
abstractNote = {We designed and implemented MIC-SVM, a highly efficient parallel SVM for x86 based multicore and many-core architectures, such as the Intel Ivy Bridge CPUs and Intel Xeon Phi co-processor (MIC). We propose various novel analysis methods and optimization techniques to fully utilize the multilevel parallelism provided by these architectures and serve as general optimization methods for other machine learning tools.},
doi = {10.1016/j.jpdc.2014.09.005},
url = {https://www.osti.gov/biblio/1184976},
journal = {Journal of Parallel and Distributed Computing, 76:16-31},
number = ,
volume = ,
place = {United States},
year = {Sun Feb 01 00:00:00 EST 2015},
month = {Sun Feb 01 00:00:00 EST 2015}
}
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