Multi-input and binary reproducible, high bandwidth floating point adder in a collective network
To add floating point numbers in a parallel computing system, a collective logic device receives the floating point numbers from computing nodes. The collective logic devices converts the floating point numbers to integer numbers. The collective logic device adds the integer numbers and generating a summation of the integer numbers. The collective logic device converts the summation to a floating point number. The collective logic device performs the receiving, the converting the floating point numbers, the adding, the generating and the converting the summation in one pass. One pass indicates that the computing nodes send inputs only once to the collective logic device and receive outputs only once from the collective logic device.
- Research Organization:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- B554331
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Number(s):
- 8,977,669
- Application Number:
- 12/684,776
- OSTI ID:
- 1172141
- Resource Relation:
- Patent File Date: 2010 Jan 08
- Country of Publication:
- United States
- Language:
- English
Data processor having capability to perform both floating point operations and memory access in response to a single instruction
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Arithmetic functions in torus and tree networks
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