AYUSH: A Technique for Extending Lifetime of SRAM-NVM Hybrid Caches
- ORNL
Recently, researchers have explored way-based hybrid SRAM-NVM (non-volatile memory) last level caches (LLCs) to bring the best of SRAM and NVM together. However, the limited write endurance of NVMs restricts the lifetime of these hybrid caches. We present AYUSH, a technique to enhance the lifetime of hybrid caches, which works by using data-migration to preferentially use SRAM for storing frequently-reused data. Microarchitectural simulations confirm that AYUSH achieves larger improvement in lifetime than a previous technique and also maintains performance and energy efficiency. For single, dual and quad-core workloads, the average increase in cache lifetime with AYUSH is 6.90X, 24.06X and 47.62X, respectively.
- Research Organization:
- Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC)
- DOE Contract Number:
- DE-AC05-00OR22725
- OSTI ID:
- 1157141
- Journal Information:
- IEEE Computer Architecture Letters, Journal Name: IEEE Computer Architecture Letters; ISSN 1556--6056
- Country of Publication:
- United States
- Language:
- English
Similar Records
WriteSmoothing: Improving Lifetime of Non-volatile Caches Using Intra-set Wear-leveling
EqualWrites: Reducing Intra-set Write Variations for Enhancing Lifetime of Non-volatile Caches