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Title: Distributed trace using central performance counter memory

Patent ·
OSTI ID:1082735
;

A plurality of processing cores, are central storage unit having at least memory connected in a daisy chain manner, forming a daisy chain ring layout on an integrated chip. At least one of the plurality of processing cores places trace data on the daisy chain connection for transmitting the trace data to the central storage unit, and the central storage unit detects the trace data and stores the trace data in the memory co-located in with the central storage unit.

Research Organization:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
B554331
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Number(s):
8,356,122
Application Number:
12/684,804
OSTI ID:
1082735
Country of Publication:
United States
Language:
English

References (10)

Method, apparatus and computer program product for efficient per thread performance information patent August 2005
Opportunistic improvement of MMIO request handling based on target reporting of space requirements patent November 2011
Performance monitor synchronization in a multiprocessor system patent November 2002
Method and apparatus for obtaining trace information of multiple processors on an SoC using a segmented trace ring bus to enable a flexible trace output configuration patent June 2010
Apparatus for monitoring data transfers of an oemi channel interface patent March 1994
Integrated circuit patent March 2007
3D virtual environment creation management and delivery system patent May 2000
Centralized performance monitoring architecture patent March 1999
Memory in a programmable logic device patent September 1998
Simultaneous real-time trace and debug for multiple processing core systems on a chip patent July 2006

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