Complementary GaAs junction-gated heterostructure field effect transistor technology
Conference
·
OSTI ID:10182444
The first circuit results for a new GaAs complementary logic technology are presented. The technology allows for Independently optimizable p- and n- channel transistors with junction gates. Excellent loaded gate delays of 179 ps at 1.2 V and 319 ps at 0.8 V have been demonstrated at low power supply voltages. A power-delay product of 8.9 fJ was obtained at 0.8 V.
- Research Organization:
- Sandia National Labs., Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE, Washington, DC (United States)
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 10182444
- Report Number(s):
- SAND-94-1302C; CONF-9410195-1; ON: DE94018901; BR: GB0103012
- Resource Relation:
- Conference: GaAs symposium,Philadelphia, PA (United States),16-19 Oct 1994; Other Information: PBD: [1994]
- Country of Publication:
- United States
- Language:
- English
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