skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Method and apparatus for single-stepping coherence events in a multiprocessor system under software control

Abstract

An apparatus and method are disclosed for single-stepping coherence events in a multiprocessor system under software control in order to monitor the behavior of a memory coherence mechanism. Single-stepping coherence events in a multiprocessor system is made possible by adding one or more step registers. By accessing these step registers, one or more coherence requests are processed by the multiprocessor system. The step registers determine if the snoop unit will operate by proceeding in a normal execution mode, or operate in a single-step mode.

Inventors:
 [1];  [2]
  1. Ridgefield, CT
  2. Chappaqua, NY
Publication Date:
Research Org.:
International Business Machines Corporation (Armonk, NY)
Sponsoring Org.:
USDOE
OSTI Identifier:
1017452
Patent Number(s):
7,827,391
Application Number:
11/768,857
Assignee:
International Business Machines Corporation (Armonk, NY)
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English

Citation Formats

Blumrich, Matthias A, and Salapura, Valentina. Method and apparatus for single-stepping coherence events in a multiprocessor system under software control. United States: N. p., 2010. Web.
Blumrich, Matthias A, & Salapura, Valentina. Method and apparatus for single-stepping coherence events in a multiprocessor system under software control. United States.
Blumrich, Matthias A, and Salapura, Valentina. Tue . "Method and apparatus for single-stepping coherence events in a multiprocessor system under software control". United States. https://www.osti.gov/servlets/purl/1017452.
@article{osti_1017452,
title = {Method and apparatus for single-stepping coherence events in a multiprocessor system under software control},
author = {Blumrich, Matthias A and Salapura, Valentina},
abstractNote = {An apparatus and method are disclosed for single-stepping coherence events in a multiprocessor system under software control in order to monitor the behavior of a memory coherence mechanism. Single-stepping coherence events in a multiprocessor system is made possible by adding one or more step registers. By accessing these step registers, one or more coherence requests are processed by the multiprocessor system. The step registers determine if the snoop unit will operate by proceeding in a normal execution mode, or operate in a single-step mode.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2010},
month = {11}
}

Patent:

Save / Share:

Works referenced in this record:

Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
journal, August 2005

  • Pande, P. P.; Grecu, C.; Jones, M.
  • IEEE Transactions on Computers, Vol. 54, Issue 8
  • DOI: 10.1109/TC.2005.134

Directory-based cache coherence in large-scale multiprocessors
journal, June 1990

  • Chaiken, D.; Fields, C.; Kurihara, K.
  • Computer, Vol. 23, Issue 6
  • DOI: 10.1109/2.55500

Performance evaluation of adaptive MPI
conference, January 2006

  • Huang, Chao; Zheng, Gengbin; Kalé, Laxmikant
  • Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming - PPoPP '06
  • DOI: 10.1145/1122971.1122976

Synchronization, coherence, and event ordering in multiprocessors
journal, February 1988

  • Dubois, M.; Scheurich, C.; Briggs, F. A.
  • Computer, Vol. 21, Issue 2
  • DOI: 10.1109/2.15

Overview of the Blue Gene/L system architecture
journal, March 2005

  • Gara, A.; Blumrich, M. A.; Chen, D.
  • IBM Journal of Research and Development, Vol. 49, Issue 2.3
  • DOI: 10.1147/rd.492.0195

Optimization of MPI collective communication on BlueGene/L systems
conference, January 2005

  • Almási, George; Heidelberger, Philip; Archer, Charles J.
  • Proceedings of the 19th annual international conference on Supercomputing - ICS '05
  • DOI: 10.1145/1088149.1088183

Intel 870: a building block for cost-effective, scalable servers
journal, March 2002


Blue Gene/L advanced diagnostics environment
journal, March 2005

  • Giampapa, M. E.; Bellofatto, R.; Blumrich, M. A.
  • IBM Journal of Research and Development, Vol. 49, Issue 2.3
  • DOI: 10.1147/rd.492.0319