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Title: Evaluation of soft-core processors on a Xilinx Virtex-5 field programmable gate array.

Abstract

Node-based architecture (NBA) designs for future satellite projects hold the promise of decreasing system development time and costs, size, weight, and power and positioning the laboratory to address other emerging mission opportunities quickly. Reconfigurable field programmable gate array (FPGA)-based modules will comprise the core of several of the NBA nodes. Microprocessing capabilities will be necessary with varying degrees of mission-specific performance requirements on these nodes. To enable the flexibility of these reconfigurable nodes, it is advantageous to incorporate the microprocessor into the FPGA itself, either as a hard-core processor built into the FPGA or as a soft-core processor built out of FPGA elements. This document describes the evaluation of three reconfigurable FPGA-based soft-core processors for use in future NBA systems: the MicroBlaze (uB), the open-source Leon3, and the licensed Leon3. Two standard performance benchmark applications were developed for each processor. The first, Dhrystone, is a fixed-point operation metric. The second, Whetstone, is a floating-point operation metric. Several trials were run at varying code locations, loop counts, processor speeds, and cache configurations. FPGA resource utilization was recorded for each configuration.

Authors:
Publication Date:
Research Org.:
Sandia National Laboratories
Sponsoring Org.:
USDOE
OSTI Identifier:
1013229
Report Number(s):
SAND2011-2733
TRN: US201110%%626
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Technical Report
Country of Publication:
United States
Language:
English
Subject:
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; ARCHITECTURE; BENCHMARKS; CONFIGURATION; EVALUATION; FLEXIBILITY; MICROPROCESSORS; PERFORMANCE; POSITIONING; SATELLITES

Citation Formats

Learn, Mark Walter. Evaluation of soft-core processors on a Xilinx Virtex-5 field programmable gate array.. United States: N. p., 2011. Web. doi:10.2172/1013229.
Learn, Mark Walter. Evaluation of soft-core processors on a Xilinx Virtex-5 field programmable gate array.. United States. doi:10.2172/1013229.
Learn, Mark Walter. Fri . "Evaluation of soft-core processors on a Xilinx Virtex-5 field programmable gate array.". United States. doi:10.2172/1013229. https://www.osti.gov/servlets/purl/1013229.
@article{osti_1013229,
title = {Evaluation of soft-core processors on a Xilinx Virtex-5 field programmable gate array.},
author = {Learn, Mark Walter},
abstractNote = {Node-based architecture (NBA) designs for future satellite projects hold the promise of decreasing system development time and costs, size, weight, and power and positioning the laboratory to address other emerging mission opportunities quickly. Reconfigurable field programmable gate array (FPGA)-based modules will comprise the core of several of the NBA nodes. Microprocessing capabilities will be necessary with varying degrees of mission-specific performance requirements on these nodes. To enable the flexibility of these reconfigurable nodes, it is advantageous to incorporate the microprocessor into the FPGA itself, either as a hard-core processor built into the FPGA or as a soft-core processor built out of FPGA elements. This document describes the evaluation of three reconfigurable FPGA-based soft-core processors for use in future NBA systems: the MicroBlaze (uB), the open-source Leon3, and the licensed Leon3. Two standard performance benchmark applications were developed for each processor. The first, Dhrystone, is a fixed-point operation metric. The second, Whetstone, is a floating-point operation metric. Several trials were run at varying code locations, loop counts, processor speeds, and cache configurations. FPGA resource utilization was recorded for each configuration.},
doi = {10.2172/1013229},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Fri Apr 01 00:00:00 EDT 2011},
month = {Fri Apr 01 00:00:00 EDT 2011}
}

Technical Report:

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