Future technology challenges for failure analysis

Conference · Tue Aug 01 00:00:00 EDT 1995

OSTI ID:100084

Anderson, R E; Soden, J M; Henderson, C L

Failure analysis is a critical element in the integrated circuit manufacturing industry. This paper explores the challenges for IC failure analysis in the environment of present and future silicon IC technology trends, using the 1994 National Technology Roadmap for Semiconductors as a technology guide. Advanced failure analysis techniques that meet the challenges of state-of-the-art IC technology are described and their applications are discussed. New paradigms will be required for failure analysis to keep pace with future advancements in IC technology.

• Research Organization: Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
• Sponsoring Organization: USDOE, Washington, DC (United States)
• DOE Contract Number: AC04-94AL85000
• OSTI ID: 100084
• Report Number(s): SAND-95-0624C; CONF-951156-1; ON: DE95016411
• Resource Relation: Conference: ISTFA `95: 21. international symposium for testing and failure analysis, Santa Clara, CA (United States), 5-10 Nov 1995; Other Information: PBD: [1995]
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING NOT INCLUDED IN OTHER CATEGORIES
INTEGRATED CIRCUITS
FAILURE MODE ANALYSIS
SUBSTRATES
RELIABILITY
SCANNING ELECTRON MICROSCOPY
IMAGES
ELECTRICAL TESTING