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Title: Nanoeletromechanical switch and logic circuits formed therefrom

Patent ·
OSTI ID:985222

A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.

Research Organization:
Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC04-94AL85000
Assignee:
Sandia Corporation (Albuquerque, NM)
Patent Number(s):
7,719,318
Application Number:
12/265,200
OSTI ID:
985222
Country of Publication:
United States
Language:
English

References (12)

3-D Nanoarchitectures With Carbon Nanotube Mechanical Switches for Future On-Chip Network Beyond CMOS Architecture journal November 2007
Carbon Nanotube-Based Nonvolatile Random Access Memory for Molecular Computing journal July 2000
Novel architecture based on floating gate CNT-NEMS switches and its application to 3D on-chip bus beyond CMOS architecture conference January 2006
Feedback controlled nanocantilever device journal July 2004
MEMS mechanical logic units: design and fabrication with micragem and polymumps conference March 2005
Small Slope Micro/Nano-Electronic Switches conference October 2007
Hybridization of CMOS With CNT-Based Nano-Electromechanical Switch for Low Leakage and Robust Circuit Design journal November 2007
Design Considerations for Complementary Nanoelectromechanical Logic Gates conference December 2007
Analytical Modeling of the Suspended-Gate FET and Design Insights for Low-Power Logic journal January 2008
Design and Analysis of Hybrid NEMS-CMOS Circuits for Ultra Low-Power Applications conference June 2007
Compact Nano-Electro-Mechanical Non-Volatile Memory (NEMory) for 3D Integration conference December 2007
Silicon nanowire electromechanical switches for logic device application journal July 2007

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