Interconnection arrangement of routers of processor boards in array of cabinets supporting secure physical partition
- Albuquerque, NM
A multiple processor computing apparatus includes a physical interconnect structure that is flexibly configurable to support selective segregation of classified and unclassified users. The physical interconnect structure includes routers in service or compute processor boards distributed in an array of cabinets connected in series on each board and to respective routers in neighboring row cabinet boards with the routers in series connection coupled to routers in series connection in respective neighboring column cabinet boards. The array can include disconnect cabinets or respective routers in all boards in each cabinet connected in a toroid. The computing apparatus can include an emulator which permits applications from the same job to be launched on processors that use different operating systems.
- Research Organization:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC04-94AL8500
- Assignee:
- Sandia Corporation (Albuquerque, NM)
- Patent Number(s):
- 7,246,217
- Application Number:
- 11/110,344
- OSTI ID:
- 913113
- Country of Publication:
- United States
- Language:
- English
Massively parallel computing using commodity components
|
journal | February 2000 |
Scalable parallel application launch on Cplant#8482;
|
conference | January 2001 |
Similar Records
Method and apparatus for interconnecting processors in a hyper-dimensional array
Rectangle-probe router for multilayer PC boards