Lambda network having 2.sup.m-1 nodes in each of m stages with each node coupled to four other nodes for bidirectional routing of data packets between nodes
Patent
·
OSTI ID:870187
- (825 El Quanito Dr., Danville, CA 94526)
The Lambda network is a single stage, packet-switched interprocessor communication network for a distributed memory, parallel processor computer. Its design arises from the desired network characteristics of minimizing mean and maximum packet transfer time, local routing, expandability, deadlock avoidance, and fault tolerance. The network is based on fixed degree nodes and has mean and maximum packet transfer distances where n is the number of processors. The routing method is detailed, as are methods for expandability, deadlock avoidance, and fault tolerance.
- Research Organization:
- AT&T
- DOE Contract Number:
- AC04-76DP00789
- Assignee:
- Napolitano, Jr., Leonard M. (825 El Quanito Dr., Danville, CA 94526)
- Patent Number(s):
- US 5471623
- OSTI ID:
- 870187
- Country of Publication:
- United States
- Language:
- English
Similar Records
Lambda network having 2{sup m{minus}1} nodes in each of m stages with each node coupled to four other nodes for bidirectional routing of data packets between nodes
Packet-switched intercommunication network for distributed memory, parallel processor computers
Packet-switched intercommunication network for distributed memory, parallel processor computers
Patent
·
Tue Nov 28 00:00:00 EST 1995
·
OSTI ID:870187
Packet-switched intercommunication network for distributed memory, parallel processor computers
Patent Application
·
Mon Dec 31 00:00:00 EST 1990
·
OSTI ID:870187
Packet-switched intercommunication network for distributed memory, parallel processor computers
Patent Application
·
Mon Jan 01 00:00:00 EST 1990
·
OSTI ID:870187
Related Subjects
lambda
network
m-1
nodes
stages
node
coupled
bidirectional
routing
data
packets
single
stage
packet-switched
interprocessor
communication
distributed
memory
parallel
processor
computer
design
arises
desired
characteristics
minimizing
mean
maximum
packet
transfer
time
local
expandability
deadlock
avoidance
fault
tolerance
based
fixed
degree
distances
processors
method
detailed
methods
single stage
communication network
parallel processor
parallel process
processor computer
lambda network
/709/370/
network
m-1
nodes
stages
node
coupled
bidirectional
routing
data
packets
single
stage
packet-switched
interprocessor
communication
distributed
memory
parallel
processor
computer
design
arises
desired
characteristics
minimizing
mean
maximum
packet
transfer
time
local
expandability
deadlock
avoidance
fault
tolerance
based
fixed
degree
distances
processors
method
detailed
methods
single stage
communication network
parallel processor
parallel process
processor computer
lambda network
/709/370/