High speed transient sampler
- Livermore, CA
A high speed sampler comprises a meandered sample transmission line for transmitting an input signal, a straight strobe transmission line for transmitting a strobe signal, and a plurality of sampling gates along the transmission lines. The sampling gates comprise a four terminal diode bridge having a first strobe resistor connected from a first terminal of the bridge to the positive strobe line, a second strobe resistor coupled from the third terminal of the bridge to the negative strobe line, a tap connected to the second terminal of the bridge and to the sample transmission line, and a sample holding capacitor connected to the fourth terminal of the bridge. The resistance of the first and second strobe resistors is much higher than the signal transmission line impedance in the preferred system. This results in a sampling gate which applies a very small load on the sample transmission line and on the strobe generator. The sample holding capacitor is implemented using a smaller capacitor and a larger capacitor isolated from the smaller capacitor by resistance. The high speed sampler of the present invention is also characterized by other optimizations, including transmission line tap compensation, stepped impedance strobe line, a multi-layer physical layout, and unique strobe generator design. A plurality of banks of such samplers are controlled for concatenated or interleaved sample intervals to achieve long sample lengths or short sample spacing.
- Research Organization:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- DOE Contract Number:
- W-7405-ENG-48
- Assignee:
- Regents of University of California (Oakland, CA)
- Patent Number(s):
- US 5471162
- OSTI ID:
- 870186
- Country of Publication:
- United States
- Language:
- English
Full monolithic sampling head IC
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Related Subjects
transient
sampler
comprises
meandered
sample
transmission
line
transmitting
input
signal
straight
strobe
plurality
sampling
gates
lines
comprise
terminal
diode
bridge
resistor
connected
positive
coupled
third
negative
tap
holding
capacitor
fourth
resistance
resistors
impedance
preferred
results
gate
applies
load
generator
implemented
larger
isolated
characterized
optimizations
including
compensation
stepped
multi-layer
physical
layout
unique
design
banks
samplers
controlled
concatenated
interleaved
intervals
achieve
lengths
spacing
speed sampler
signal transmission
sampling gate
transmission lines
transmission line
input signal
strobe transmission
sample transmission
sampler comprises
sampling gates
strobe signal
transient sampler
speed transient
speed sample
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